Commit 182bd3c1 authored by Isaac Oscar Gariano's avatar Isaac Oscar Gariano

Updated rust formatting

parent 917adf40
......@@ -2742,8 +2742,8 @@ impl CodeGenerator for ASMCodeGen {
trace_emit!("\tFMOV {} -> {}", src, dest);
let (reg1, id1, loc1) = self.prepare_reg(dest, 4 + 1);
// GCC complains if the immediate argument has no decimal part (it will treat it as an integer)
// (e.g. #1 is an error, but #1.0 is not)
// GCC complains if the immediate argument has no decimal part
// (it will treat it as an integer, e.g. #1 is an error, but #1.0 is not)
let asm = if src == src.trunc() {
// src is an integer, append '.0'
format!("FMOV {},#{}.0", reg1, src)
......@@ -3684,7 +3684,8 @@ pub fn emit_context_with_reloc(
Some(label) => label,
None => {
panic!(
"cannot find label for address {}, it is not dumped by GC (why GC didn't trace to it)",
"cannot find label for address {}, it is not dumped by GC (why \
GC didn't trace to it)",
load_ref
)
}
......
This source diff could not be displayed because it is too large. You can view the blob instead.
......@@ -132,12 +132,18 @@ GPR_ALIAS!(SP_ALIAS: (62, SP) -> WSP); // Special register(only some instructio
GPR_ALIAS!(XZR_ALIAS: (64, XZR) -> WZR); // Pseudo register, not to be used by register allocator
// Aliases
ALIAS!(X8 -> XR); // Indirect result location register (points to a location in memory to write return values to)
ALIAS!(X16 -> IP0); // Intra proecdure call register 0 (may be modified by the linker when executing BL/BLR instructions)
ALIAS!(X17 -> IP1); // Intra proecdure call register 1 (may be modified by the linker when executing BL/BLR instructions)
ALIAS!(X18 -> PR); // Platform Register (NEVER TOUCH THIS REGISTER (Unless you can prove Linux dosn't use it))
ALIAS!(X29 -> FP); // Frame Pointer (can be used as a normal register when not calling or returning)
ALIAS!(X30 -> LR); // Link Register (not supposed to be used for any other purpose)
// Indirect result location register (points to a location in memory to write return values to)
ALIAS!(X8 -> XR);
// Intraprocedure call register 0 (may be modified by the linker when executing BL/BLR instructions)
ALIAS!(X16 -> IP0);
// Intraprocedure call register 1 (may be modified by the linker when executing BL/BLR instructions)
ALIAS!(X17 -> IP1);
// Platform Register (NEVER TOUCH THIS REGISTER (Unless you can prove Linux dosn't use it))
ALIAS!(X18 -> PR);
// Frame Pointer (can be used as a normal register when not calling or returning)
ALIAS!(X29 -> FP);
// Link Register (not supposed to be used for any other purpose)
ALIAS!(X30 -> LR);
lazy_static! {
pub static ref GPR_ALIAS_TABLE : LinkedHashMap<MuID, Vec<P<Value>>> = {
......@@ -1214,7 +1220,8 @@ pub fn is_valid_immediate_offset(val: i64, n: usize) -> bool {
if n <= 8 {
(val >= -(1 << 8) && val < (1 << 8)) || // Valid 9 bit signed unscaled offset
// Valid unsigned 12-bit scalled offset
(val >= 0 && (val as u64) % (n_align as u64) == 0 && ((val as u64) / (n_align as u64) < (1 << 12)))
val >= 0 && (val as u64) % (n_align as u64) == 0 &&
((val as u64) / (n_align as u64) < (1 << 12))
} else {
// Will be using a load/store-pair
// Is val a signed 7 bit multiple of n_align
......
......@@ -235,7 +235,6 @@ pub trait CodeGenerator {
func: &P<Value>,
pe: Option<MuName>,
args: Vec<P<Value>>
pe: Option<MuName>
) -> ValueLocation;
fn emit_call_near_mem64(
&mut self,
......
......@@ -3466,7 +3466,7 @@ impl<'a> InstructionSelection {
args: &Vec<P<Value>>,
f_context: &mut FunctionContext,
vm: &VM
) -> usize {
) -> (usize, Vec<P<Value>>) {
// put args into registers if we can
// in the meantime record args that do not fit in registers
let mut stack_args: Vec<P<Value>> = vec![];
......@@ -3719,7 +3719,7 @@ impl<'a> InstructionSelection {
f_context: &mut FunctionContext,
vm: &VM
) -> Vec<P<Value>> {
let stack_arg_size = self.emit_precall_convention(&args, f_context, vm);
let (stack_arg_size, args) = self.emit_precall_convention(&args, f_context, vm);
// make call
if vm.is_doing_jit() {
......@@ -3728,7 +3728,7 @@ impl<'a> InstructionSelection {
let callsite = self.new_callsite_label(cur_node);
// assume ccall wont throw exception
self.backend
.emit_call_near_rel32(callsite.clone(), func_name, None, true);
.emit_call_near_rel32(callsite.clone(), func_name, None, args, true);
// TODO: What if theres an exception block?
self.current_callsites
......@@ -3893,8 +3893,13 @@ impl<'a> InstructionSelection {
unimplemented!()
} else {
let callsite = self.new_callsite_label(Some(cur_node));
self.backend
.emit_call_near_rel32(callsite, target.name(), potentially_excepting, arg_regs, false)
self.backend.emit_call_near_rel32(
callsite,
target.name(),
potentially_excepting,
arg_regs,
false
)
}
} else if self.match_ireg(func) {
let target = self.emit_ireg(func, f_content, f_context, vm);
......
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