WARNING! Access to this system is limited to authorised users only.
Unauthorised users may be subject to prosecution.
Unauthorised access to this system is a criminal offence under Australian law (Federal Crimes Act 1914 Part VIA)
It is a criminal offence to:
(1) Obtain access to data without authority. -Penalty 2 years imprisonment.
(2) Damage, delete, alter or insert data without authority. -Penalty 10 years imprisonment.
User activity is monitored and recorded. Anyone using this system expressly consents to such monitoring and recording.

To protect your data, the CISO officer has suggested users to enable 2FA as soon as possible.
Currently 2.6% of users enabled 2FA.

Commit 95e36fa2 authored by Isaac Oscar Gariano's avatar Isaac Oscar Gariano
Browse files

Updated rust formating (again)

parent 59cde7c2
......@@ -50,7 +50,7 @@ struct ASMCode {
entry: MuName,
blocks: LinkedHashMap<MuName, ASMBlock>,
frame_size_patchpoints: Vec<ASMLocation>,
frame_size_patchpoints: Vec<ASMLocation>
}
unsafe impl Send for ASMCode {}
......@@ -118,7 +118,7 @@ impl ASMCode {
fn rewrite_insert(
&self,
insert_before: LinkedHashMap<usize, Vec<Box<ASMCode>>>,
insert_after: LinkedHashMap<usize, Vec<Box<ASMCode>>>,
insert_after: LinkedHashMap<usize, Vec<Box<ASMCode>>>
) -> Box<ASMCode> {
trace!("insert spilling code");
let mut ret = ASMCode {
......@@ -126,7 +126,7 @@ impl ASMCode {
entry: self.entry.clone(),
code: vec![],
blocks: linked_hashmap!{},
frame_size_patchpoints: vec![],
frame_size_patchpoints: vec![]
};
// iterate through old machine code
......@@ -203,7 +203,7 @@ impl ASMCode {
end_inst: cur_block_end,
livein: vec![],
liveout: vec![],
liveout: vec![]
};
trace!(" old block: {:?}", block);
......@@ -222,7 +222,7 @@ impl ASMCode {
line: *location_map.get(&patchpoint.line).unwrap(),
index: patchpoint.index,
len: patchpoint.len,
oplen: patchpoint.oplen,
oplen: patchpoint.oplen
};
ret.frame_size_patchpoints.push(new_patchpoint);
......@@ -539,7 +539,7 @@ impl MachineCode for ASMCode {
false
}
}
None => false,
None => false
}
}
......@@ -566,7 +566,7 @@ impl MachineCode for ASMCode {
Some(demangle_name(String::from(split[2])))
}
_ => None,
_ => None
}
}
......@@ -578,7 +578,7 @@ impl MachineCode for ASMCode {
Some(demangle_name(String::from(split[0])))
}
_ => None,
_ => None
}
}
......@@ -586,7 +586,7 @@ impl MachineCode for ASMCode {
if let Some(inst) = self.code.get(index) {
match inst.spill_info {
Some(SpillMemInfo::Load(ref p)) => Some(p.clone()),
_ => None,
_ => None
}
} else {
None
......@@ -597,7 +597,7 @@ impl MachineCode for ASMCode {
if let Some(inst) = self.code.get(index) {
match inst.spill_info {
Some(SpillMemInfo::Store(ref p)) => Some(p.clone()),
_ => None,
_ => None
}
} else {
None
......@@ -632,7 +632,7 @@ impl MachineCode for ASMCode {
&mut inst_to_patch.code,
loc.index,
&to_reg_string,
to_reg_string.len(),
to_reg_string.len()
);
}
......@@ -647,7 +647,7 @@ impl MachineCode for ASMCode {
&mut inst_to_patch.code,
loc.index,
&to_reg_string,
to_reg_string.len(),
to_reg_string.len()
);
}
}
......@@ -665,7 +665,7 @@ impl MachineCode for ASMCode {
&mut asm.code,
loc.index,
&to_reg_string,
to_reg_string.len(),
to_reg_string.len()
);
}
......@@ -689,7 +689,7 @@ impl MachineCode for ASMCode {
&mut asm.code,
loc.index,
&to_reg_string,
to_reg_string.len(),
to_reg_string.len()
);
}
......@@ -820,14 +820,14 @@ impl MachineCode for ASMCode {
fn get_ir_block_livein(&self, block: &str) -> Option<&Vec<MuID>> {
match self.blocks.get(block) {
Some(ref block) => Some(&block.livein),
None => None,
None => None
}
}
fn get_ir_block_liveout(&self, block: &str) -> Option<&Vec<MuID>> {
match self.blocks.get(block) {
Some(ref block) => Some(&block.liveout),
None => None,
None => None
}
}
......@@ -852,7 +852,7 @@ impl MachineCode for ASMCode {
fn get_block_range(&self, block: &str) -> Option<ops::Range<usize>> {
match self.blocks.get(block) {
Some(ref block) => Some(block.start_inst..block.end_inst),
None => None,
None => None
}
}
......@@ -881,14 +881,14 @@ enum ASMBranchTarget {
Unconditional(MuName),
PotentiallyExcepting(MuName),
Return,
UnconditionalReg(MuID),
UnconditionalReg(MuID)
}
#[derive(Clone, Debug)]
enum SpillMemInfo {
Load(P<Value>),
Store(P<Value>),
CalleeSaved, // Callee saved record
CalleeSaved // Callee saved record
}
#[derive(Clone, Debug)]
......@@ -905,7 +905,7 @@ struct ASMInst {
succs: Vec<usize>,
branch: ASMBranchTarget,
spill_info: Option<SpillMemInfo>,
spill_info: Option<SpillMemInfo>
}
impl ASMInst {
......@@ -920,7 +920,7 @@ impl ASMInst {
succs: vec![],
branch: ASMBranchTarget::None,
spill_info: None,
spill_info: None
}
}
......@@ -930,7 +930,7 @@ impl ASMInst {
uses: LinkedHashMap<MuID, Vec<ASMLocation>>,
is_mem_op_used: bool,
target: ASMBranchTarget,
spill_info: Option<SpillMemInfo>,
spill_info: Option<SpillMemInfo>
) -> ASMInst {
ASMInst {
code: inst,
......@@ -942,7 +942,7 @@ impl ASMInst {
succs: vec![],
branch: target,
spill_info: spill_info,
spill_info: spill_info
}
}
}
......@@ -952,7 +952,7 @@ struct ASMLocation {
line: usize,
index: usize,
len: usize,
oplen: usize,
oplen: usize
}
impl ASMLocation {
......@@ -961,7 +961,7 @@ impl ASMLocation {
line: line,
index: index,
len: len,
oplen: oplen,
oplen: oplen
}
}
}
......@@ -973,7 +973,7 @@ struct ASMBlock {
end_inst: usize,
livein: Vec<MuID>,
liveout: Vec<MuID>,
liveout: Vec<MuID>
}
impl ASMBlock {
......@@ -982,13 +982,13 @@ impl ASMBlock {
start_inst: usize::MAX,
end_inst: usize::MAX,
livein: vec![],
liveout: vec![],
liveout: vec![]
}
}
}
pub struct ASMCodeGen {
cur: Option<Box<ASMCode>>,
cur: Option<Box<ASMCode>>
}
const REG_PLACEHOLDER_LEN: usize = 5;
......@@ -1035,7 +1035,7 @@ impl ASMCodeGen {
code: String,
potentially_excepting: Option<MuName>,
arguments: Vec<P<Value>>,
target: Option<(MuID, ASMLocation)>,
target: Option<(MuID, ASMLocation)>
) {
// a call instruction will use all the argument registers
// do not need
......@@ -1072,7 +1072,7 @@ impl ASMCodeGen {
ASMBranchTarget::None
}
},
None,
None
)
}
......@@ -1081,7 +1081,7 @@ impl ASMCodeGen {
code: String,
defines: LinkedHashMap<MuID, Vec<ASMLocation>>,
uses: LinkedHashMap<MuID, Vec<ASMLocation>>,
is_using_mem_op: bool,
is_using_mem_op: bool
) {
self.add_asm_inst_internal(
code,
......@@ -1089,7 +1089,7 @@ impl ASMCodeGen {
uses,
is_using_mem_op,
ASMBranchTarget::None,
None,
None
)
}
......@@ -1098,7 +1098,7 @@ impl ASMCodeGen {
code: String,
defines: LinkedHashMap<MuID, Vec<ASMLocation>>,
uses: LinkedHashMap<MuID, Vec<ASMLocation>>,
is_using_mem_op: bool,
is_using_mem_op: bool
) {
self.add_asm_inst_internal(
code,
......@@ -1106,7 +1106,7 @@ impl ASMCodeGen {
uses,
is_using_mem_op,
ASMBranchTarget::None,
Some(SpillMemInfo::CalleeSaved),
Some(SpillMemInfo::CalleeSaved)
)
}
......@@ -1116,7 +1116,7 @@ impl ASMCodeGen {
defines: LinkedHashMap<MuID, Vec<ASMLocation>>,
uses: LinkedHashMap<MuID, Vec<ASMLocation>>,
is_using_mem_op: bool,
spill_info: SpillMemInfo,
spill_info: SpillMemInfo
) {
self.add_asm_inst_internal(
code,
......@@ -1124,7 +1124,7 @@ impl ASMCodeGen {
uses,
is_using_mem_op,
ASMBranchTarget::None,
Some(spill_info),
Some(spill_info)
)
}
......@@ -1135,7 +1135,7 @@ impl ASMCodeGen {
uses: LinkedHashMap<MuID, Vec<ASMLocation>>,
is_using_mem_op: bool,
target: ASMBranchTarget,
spill_info: Option<SpillMemInfo>,
spill_info: Option<SpillMemInfo>
) {
trace!("asm: {}", demangle_text(code.clone()));
trace!(" defines: {:?}", defines);
......@@ -1149,7 +1149,7 @@ impl ASMCodeGen {
uses,
is_using_mem_op,
target,
spill_info,
spill_info
));
}
......@@ -1157,7 +1157,7 @@ impl ASMCodeGen {
if cfg!(debug_assertions) {
match op.v {
Value_::SSAVar(_) => {}
_ => panic!("expecting register op"),
_ => panic!("expecting register op")
}
}
......@@ -1166,19 +1166,19 @@ impl ASMCodeGen {
(
str,
op.extract_ssa_id().unwrap(),
ASMLocation::new(self.line(), loc, len, check_op_len(&op.ty)),
ASMLocation::new(self.line(), loc, len, check_op_len(&op.ty))
)
}
fn prepare_mem(
&self,
op: &P<Value>,
loc: usize,
loc: usize
) -> (String, LinkedHashMap<MuID, Vec<ASMLocation>>) {
if cfg!(debug_assertions) {
match op.v {
Value_::Memory(_) => {}
_ => panic!("expecting memory op"),
_ => panic!("expecting memory op")
}
}
......@@ -1193,7 +1193,7 @@ impl ASMCodeGen {
ref base,
ref offset,
shift,
signed,
signed
}) => {
result_str.push('[');
loc_cursor += 1;
......@@ -1252,7 +1252,7 @@ impl ASMCodeGen {
result_str.push('#');
result_str.push_str(name.as_str());
}
_ => panic!("unexpected offset type: {:?}", offset),
_ => panic!("unexpected offset type: {:?}", offset)
}
}
......@@ -1265,7 +1265,7 @@ impl ASMCodeGen {
Value_::Memory(MemoryLocation::Symbolic {
ref label,
is_global,
is_native,
is_native
}) => {
let label = if is_native {
"/*C*/".to_string() + label.as_str()
......@@ -1283,7 +1283,7 @@ impl ASMCodeGen {
Value_::Memory(MemoryLocation::VirtualAddress { .. }) => {
panic!("Can't directly use a virtual adress (try calling emit_mem first)");
}
_ => panic!("expect mem location as value"),
_ => panic!("expect mem location as value")
}
let uses: LinkedHashMap<MuID, Vec<ASMLocation>> = {
......@@ -1362,7 +1362,7 @@ impl ASMCodeGen {
asm,
linked_hashmap!{},
ignore_zero_register(id1, vec![loc1]),
false,
false
)
}
......@@ -1378,7 +1378,7 @@ impl ASMCodeGen {
linked_hashmap! { id1 => vec![loc1]},
false,
ASMBranchTarget::Conditional(dest_name),
None,
None
);
}
......@@ -1400,7 +1400,7 @@ impl ASMCodeGen {
linked_hashmap! { id1 => vec![loc1]},
false,
ASMBranchTarget::Conditional(dest_name),
None,
None
);
}
......@@ -1412,7 +1412,7 @@ impl ASMCodeGen {
src1: &P<Value>,
src2: &P<Value>,
signed: bool,
shift: u8,
shift: u8
) {
let inst = inst.to_string();
let ext_s = if signed { "S" } else { "U" };
......@@ -1457,7 +1457,7 @@ impl ASMCodeGen {
asm,
ignore_zero_register(id1, vec![loc1]),
create_hash_map(vec![(id2, loc2), (id3, loc3)]),
false,
false
)
}
......@@ -1467,7 +1467,7 @@ impl ASMCodeGen {
dest: &P<Value>,
src1: &P<Value>,
src2: u64,
shift: u8,
shift: u8
) {
let inst = inst.to_string();
trace_emit!("\t{} {}, {} LSL {} -> {}", inst, src1, src2, shift, dest);
......@@ -1485,7 +1485,7 @@ impl ASMCodeGen {
asm,
ignore_zero_register(id1, vec![loc1]),
ignore_zero_register(id2, vec![loc2]),
false,
false
)
}
......@@ -1496,7 +1496,7 @@ impl ASMCodeGen {
dest: &P<Value>,
src: &P<Value>,
shift: &str,
amount: u8,
amount: u8
) {
let inst = inst.to_string();
trace_emit!("\t{} {}, {} {} -> {}", inst, src, shift, amount, dest);
......@@ -1510,7 +1510,7 @@ impl ASMCodeGen {
asm,
ignore_zero_register(id1, vec![loc1]),
ignore_zero_register(id2, vec![loc2]),
false,
false
)
}
......@@ -1528,7 +1528,7 @@ impl ASMCodeGen {
asm,
ignore_zero_register(id1, vec![loc1]),
ignore_zero_register(id2, vec![loc2]),
false,
false
)
}
......@@ -1549,7 +1549,7 @@ impl ASMCodeGen {
asm,
ignore_zero_register(id1, vec![loc1]),
linked_hashmap!{},
false,
false
)
}
......@@ -1570,7 +1570,7 @@ impl ASMCodeGen {
asm,
ignore_zero_register(id1, vec![loc1]),
create_hash_map(vec![(id2, loc2), (id3, loc3)]),
false,
false
)
}
......@@ -1582,7 +1582,7 @@ impl ASMCodeGen {
src1: &P<Value>,
src2: &P<Value>,
shift: &str,
amount: u8,
amount: u8
) {
let inst = inst.to_string();
trace_emit!(
......@@ -1606,7 +1606,7 @@ impl ASMCodeGen {
asm,
ignore_zero_register(id1, vec![loc1]),
create_hash_map(vec![(id2, loc2), (id3, loc3)]),
false,
false
)
}
......@@ -1617,7 +1617,7 @@ impl ASMCodeGen {
dest: &P<Value>,
src1: &P<Value>,
src2: &P<Value>,
src3: &P<Value>,
src3: &P<Value>
) {
let inst = inst.to_string();
trace_emit!("\t{} {}, {}, {} -> {}", inst, src3, src1, src2, dest);
......@@ -1628,7 +1628,7 @@ impl ASMCodeGen {
self.prepare_reg(src2, inst.len() + 1 + reg1.len() + 1 + reg2.len() + 1);
let (reg4, id4, loc4) = self.prepare_reg(
src3,
inst.len() + 1 + reg1.len() + 1 + reg2.len() + 1 + reg3.len() + 1,
inst.len() + 1 + reg1.len() + 1 + reg2.len() + 1 + reg3.len() + 1
);
let asm = format!("{} {},{},{},{}", inst, reg1, reg2, reg3, reg4);
......@@ -1637,7 +1637,7 @@ impl ASMCodeGen {
asm,
ignore_zero_register(id1, vec![loc1]),
create_hash_map(vec![(id2, loc2), (id3, loc3), (id4, loc4)]),
false,
false
)
}
......@@ -1647,7 +1647,7 @@ impl ASMCodeGen {
dest: &P<Value>,
src1: &P<Value>,
src2: u64,
src3: u64,
src3: u64
) {
let inst = inst.to_string();
trace_emit!("\t{} {}, {}, {} -> {}", inst, src1, src2, src3, dest);
......@@ -1661,7 +1661,7 @@ impl ASMCodeGen {
asm,
ignore_zero_register(id1, vec![loc1]),
ignore_zero_register(id2, vec![loc2]),
false,
false
)
}
......@@ -1679,7 +1679,7 @@ impl ASMCodeGen {
asm,
linked_hashmap!{},
create_hash_map(vec![(id1, loc1), (id2, loc2)]),
false,
false
)
}
......@@ -1690,7 +1690,7 @@ impl ASMCodeGen {
src1: &P<Value>,
src2: &P<Value>,
shift: &str,
amount: u8,
amount: u8
) {
let inst = inst.to_string();
trace_emit!("\t{} {},{}, {} {}", inst, src1, src2, shift, amount);
......@@ -1704,7 +1704,7 @@ impl ASMCodeGen {
asm,
linked_hashmap!{},
create_hash_map(vec![(id1, loc1), (id2, loc2)]),
false,
false
)
}
......@@ -1715,7 +1715,7 @@ impl ASMCodeGen {
src1: &P<Value>,
src2: &P<Value>,
signed: bool,
shift: u8,
shift: u8
) {
let inst = inst.to_string();
let ext_s = if signed { "S" } else { "U" };
......@@ -1745,7 +1745,7 @@ impl ASMCodeGen {
asm,
linked_hashmap!{},
create_hash_map(vec![(id1, loc1), (id2, loc2)]),
false,
false
)
}
// PSTATE.<NZCV> = inst(src1, src2 [<< 12])
......@@ -1765,7 +1765,7 @@ impl ASMCodeGen {
asm,
linked_hashmap!{},
ignore_zero_register(id1, vec![loc1]),
false,
false
)
}
......@@ -1782,7 +1782,7 @@ impl ASMCodeGen {
asm,
linked_hashmap!{},
ignore_zero_register(id1, vec![loc1]),
false,
false
)
}
......@@ -1800,7 +1800,7 @@ impl ASMCodeGen {
asm,
ignore_zero_register(id1, vec![loc1]),
linked_hashmap!{},
false,
false
)
}
......@@ -1819,7 +1819,7 @@ impl ASMCodeGen {
asm,
ignore_zero_register(id1, vec![loc1]),
ignore_zero_register(id2, vec![loc2]),