Merge branch 'master' into ci-script

.gitignore

 **/target/*
 **/__pycache__/*
+**/.cache/*
 emit/*
 **/temp/*
 Cargo.lock

.gitlab-ci.yml

@@ -35,21 +35,21 @@ test:cargo:api:
   dependencies:
       - build_test
   script:
-    - RUST_BACKTRACE=1 CC=clang cargo test test_api
+    - RUST_BACKTRACE=1 RUST_TEST_THREADS=1 CC=clang cargo test test_api
 
 test:cargo:ir:
   stage: test
   dependencies:
       - build_test
   script:
-    - RUST_BACKTRACE=1 CC=clang cargo test test_ir
+    - RUST_BACKTRACE=1 RUST_TEST_THREADS=1 CC=clang cargo test test_ir
 
 test:cargo:compiler:
   stage: test
   dependencies:
       - build_test
   script:
-    - RUST_BACKTRACE=1 CC=clang cargo test test_compiler
+    - RUST_BACKTRACE=1 RUST_TEST_THREADS=1 CC=clang cargo test test_compiler
 
 test:cargo:runtime:
   stage: test
@@ -63,18 +63,27 @@ testjit:milestones:
   dependencies:
       - build_test
   script:
-  - RUST_BACKTRACE=1 pytest tests/test_jit/test_milestones.py
+    - RUST_BACKTRACE=1 RUST_TEST_THREADS=1 CC=clang cargo build 2>/dev/null
+    - RUST_BACKTRACE=1 pytest tests/test_jit/test_milestones.py
 
 testjit:binops:
   stage: test
   dependencies:
       - build_test
   script:
-  - RUST_BACKTRACE=1 pytest tests/test_jit/test_binops.py
+    - RUST_BACKTRACE=1 RUST_TEST_THREADS=1 CC=clang cargo build 2>/dev/null
+    - RUST_BACKTRACE=1 pytest tests/test_jit/test_binops.py
 
 testjit:cmpops:
   stage: test
   dependencies:
       - build_test
   script:
-  - RUST_BACKTRACE=1 pytest tests/test_jit/test_cmpops.py
+    - RUST_BACKTRACE=1 RUST_TEST_THREADS=1 CC=clang cargo build 2>/dev/null
+    - RUST_BACKTRACE=1 pytest tests/test_jit/test_cmpops.py
+
+testjit:cmpops:
+  stage: test
+  script:
+    - RUST_BACKTRACE=1 RUST_TEST_THREADS=1 CC=clang cargo build 2>/dev/null
+    - RUST_BACKTRACE=1 pytest tests/test_jit/test_convops.py
\ No newline at end of file

run_test.sh

@@ -64,6 +64,8 @@ echo "KERNEL: $KERNEL"
 echo "ARCH: $MACH"
 echo "---------"
 
+rm emit/*
+
 if [ "$OS" == "linux" ]; then
 	RUSTFLAGS=-Zincremental=target/incr-cache RUST_BACKTRACE=1 RUST_TEST_THREADS=1 CC=clang-3.8 cargo test "$@"
 elif [ "$OS" == "Darwin" ]; then

src/ast/src/inst.rs

@@ -91,6 +91,12 @@ pub enum Instruction_ {
 
     BinOp(BinOp, OpIndex, OpIndex),
     CmpOp(CmpOp, OpIndex, OpIndex),
+    ConvOp{
+        operation: ConvOp,
+        from_ty: P<MuType>,
+        to_ty: P<MuType>,
+        operand: OpIndex
+    },
 
     // yields a tuple of results from the call
     ExprCall{
@@ -254,6 +260,9 @@ impl Instruction_ {
         match self {
             &Instruction_::BinOp(op, op1, op2) => format!("{:?} {} {}", op, ops[op1], ops[op2]),
             &Instruction_::CmpOp(op, op1, op2) => format!("{:?} {} {}", op, ops[op1], ops[op2]),
+            &Instruction_::ConvOp{operation, ref from_ty, ref to_ty, operand} => {
+                format!("{:?} {} {} {}", operation, from_ty, to_ty, ops[operand])
+            }
             &Instruction_::ExprCall{ref data, is_abort} => {
                 let abort = select_value!(is_abort, "ABORT_ON_EXN", "RETHROW");
                 format!("CALL {} {}", data.debug_str(ops), abort)

src/ast/src/ir.rs

@@ -4,6 +4,7 @@ use inst::*;
 use op::*;
 
 use utils::vec_utils;
+use utils::Address;
 
 use std::collections::HashMap;
 use std::fmt;
@@ -735,6 +736,8 @@ pub enum Constant {
     FuncRef(MuID),
     UFuncRef(MuID),
     Vector(Vec<Constant>),
+    //Pointer(Address),
+    NullRef,
 }
 
 impl fmt::Display for Constant {
@@ -756,6 +759,7 @@ impl fmt::Display for Constant {
                 }
                 write!(f, "]")
             }
+            &Constant::NullRef => write!(f, "NullRef"),
         }
     }
 }

src/ast/src/ir_semantics.rs

@@ -5,6 +5,7 @@ pub fn is_terminal_inst(inst: &Instruction_) -> bool {
     match inst {
         &BinOp(_, _, _) 
         | &CmpOp(_, _, _)
+        | &ConvOp{..}
         | &ExprCall{..}
         | &Load{..}
         | &Store{..}
@@ -49,6 +50,7 @@ pub fn has_side_effect(inst: &Instruction_) -> bool {
     match inst {
         &BinOp(_, _, _) => false,
         &CmpOp(_, _, _) => false,
+        &ConvOp{..} => false,
         &ExprCall{..} => true,
         &Load{..} => true,
         &Store{..} => true,

src/ast/src/op.rs

@@ -35,6 +35,7 @@ pub enum OpCode {
     // expression
     Binary(BinOp),
     Comparison(CmpOp),
+    Conversion(ConvOp),
     AtomicRMW(AtomicRMWOp),
 
     ExprCall,
@@ -172,6 +173,22 @@ pub enum CmpOp {
     FUNO
 }
 
+#[derive(Copy, Clone, Debug, PartialEq, RustcEncodable, RustcDecodable)]
+pub enum ConvOp {
+    TRUNC,
+    ZEXT,
+    SEXT,
+    FPTRUNC,
+    FPEXT,
+    FPTOUI,
+    FPTOSI,
+    UITOFP,
+    SITOFP,
+    BITCAST,
+    REFCAST,
+    PTRCAST
+}
+
 #[derive(Copy, Clone, Debug, PartialEq, RustcEncodable, RustcDecodable)]
 pub enum AtomicRMWOp {
     XCHG,
@@ -207,6 +224,7 @@ pub fn pick_op_code_for_inst(inst: &Instruction) -> OpCode {
     match inst.v {
         Instruction_::BinOp(op, _, _) => OpCode::Binary(op),
         Instruction_::CmpOp(op, _, _) => OpCode::Comparison(op),
+        Instruction_::ConvOp{operation, ..} => OpCode::Conversion(operation),
         Instruction_::AtomicRMW{op, ..} => OpCode::AtomicRMW(op),
         Instruction_::ExprCall{..} => OpCode::ExprCall,
         Instruction_::Load{..} => OpCode::Load,

src/ast/src/types.rs

@@ -12,6 +12,14 @@ lazy_static! {
     pub static ref ADDRESS_TYPE : P<MuType> = P(
         MuType::new(new_internal_id(), MuType_::int(POINTER_SIZE * 8))
     );
+
+    pub static ref UINT8_TYPE : P<MuType> = P(
+        MuType::new(new_internal_id(), MuType_::int(8))
+    );
+
+    pub static ref UINT16_TYPE : P<MuType> = P(
+        MuType::new(new_internal_id(), MuType_::int(16))
+    );
     
     pub static ref UINT32_TYPE : P<MuType> = P(
         MuType::new(new_internal_id(), MuType_::int(32))
@@ -27,6 +35,8 @@ lazy_static! {
     
     pub static ref INTERNAL_TYPES : Vec<P<MuType>> = vec![
         ADDRESS_TYPE.clone(),
+        UINT8_TYPE.clone(),
+        UINT16_TYPE.clone(),
         UINT32_TYPE.clone(),
         UINT64_TYPE.clone(),
         DOUBLE_TYPE.clone()

src/compiler/backend/arch/x86_64/codegen.rs

@@ -4,6 +4,9 @@ use runtime::ValueLocation;
 
 use compiler::machine_code::MachineCode;
 
+pub type Reg<'a> = &'a P<Value>;
+pub type Mem<'a> = &'a P<Value>;
+
 pub trait CodeGenerator {
     fn start_code(&mut self, func_name: MuName) -> ValueLocation;
     fn finish_code(&mut self, func_name: MuName) -> (Box<MachineCode + Sync + Send>, ValueLocation);
@@ -21,48 +24,188 @@ pub trait CodeGenerator {
     fn end_block(&mut self, block_name: MuName);
     
     fn emit_nop(&mut self, bytes: usize);
-    
-    fn emit_cmp_r64_r64(&mut self, op1: &P<Value>, op2: &P<Value>);
-    fn emit_cmp_r64_imm32(&mut self, op1: &P<Value>, op2: i32);
-    fn emit_cmp_r64_mem64(&mut self, op1: &P<Value>, op2: &P<Value>);
-    
-    fn emit_mov_r64_imm32  (&mut self, dest: &P<Value>, src: i32);
-    fn emit_mov_r64_mem64  (&mut self, dest: &P<Value>, src: &P<Value>); // load
-    fn emit_mov_r64_r64    (&mut self, dest: &P<Value>, src: &P<Value>);
-    fn emit_mov_mem64_r64  (&mut self, dest: &P<Value>, src: &P<Value>); // store
-    fn emit_mov_mem64_imm32(&mut self, dest: &P<Value>, src: i32);
 
-    fn emit_movsd_f64_f64  (&mut self, dest: &P<Value>, src: &P<Value>);
-    fn emit_movsd_f64_mem64(&mut self, dest: &P<Value>, src: &P<Value>); // load
-    fn emit_movsd_mem64_f64(&mut self, dest: &P<Value>, src: &P<Value>); // store
-    
-    fn emit_lea_r64(&mut self, dest: &P<Value>, src: &P<Value>);
-    
-    fn emit_and_r64_imm32(&mut self, dest: &P<Value>, src: i32);
-    fn emit_and_r64_r64  (&mut self, dest: &P<Value>, src: &P<Value>);
+    // comparison
+    fn emit_cmp_r64_r64  (&mut self, op1: Reg, op2: Reg);
+    fn emit_cmp_r64_imm32(&mut self, op1: Reg, op2: i32);
+    fn emit_cmp_r64_mem64(&mut self, op1: Reg, op2: Mem);
+
+    fn emit_cmp_r32_r32  (&mut self, op1: Reg, op2: Reg);
+    fn emit_cmp_r32_imm32(&mut self, op1: Reg, op2: i32);
+    fn emit_cmp_r32_mem32(&mut self, op1: Reg, op2: Mem);
 
-    fn emit_xor_r64_r64  (&mut self, dest: &P<Value>, src: &P<Value>);
-    fn emit_xor_r64_mem64(&mut self, dest: &P<Value>, src: &P<Value>);
-    fn emit_xor_r64_imm32(&mut self, dest: &P<Value>, src: i32);
+    fn emit_cmp_r16_r16  (&mut self, op1: Reg, op2: Reg);
+    fn emit_cmp_r16_imm16(&mut self, op1: Reg, op2: i16);
+    fn emit_cmp_r16_mem16(&mut self, op1: Reg, op2: Mem);
+
+    fn emit_cmp_r8_r8    (&mut self, op1: Reg, op2: Reg);
+    fn emit_cmp_r8_imm8  (&mut self, op1: Reg, op2: i8);
+    fn emit_cmp_r8_mem8  (&mut self, op1: Reg, op2: Mem);
+
+    // gpr move
     
-    fn emit_add_r64_r64  (&mut self, dest: &P<Value>, src: &P<Value>);
-    fn emit_add_r64_mem64(&mut self, dest: &P<Value>, src: &P<Value>);
-    fn emit_add_r64_imm32(&mut self, dest: &P<Value>, src: i32);
+    fn emit_mov_r64_imm32  (&mut self, dest: Reg, src: i32);
+    fn emit_mov_r64_mem64  (&mut self, dest: Reg, src: Mem); // load
+    fn emit_mov_r64_r64    (&mut self, dest: Reg, src: Reg);
+    fn emit_mov_mem64_r64  (&mut self, dest: Mem, src: Reg); // store
+    fn emit_mov_mem64_imm32(&mut self, dest: Mem, src: i32);
 
-    fn emit_addsd_f64_f64  (&mut self, dest: &P<Value>, src: &P<Value>);
-    fn emit_addsd_f64_mem64(&mut self, dest: &P<Value>, src: &P<Value>);
+    fn emit_mov_r32_imm32  (&mut self, dest: Reg, src: i32);
+    fn emit_mov_r32_mem32  (&mut self, dest: Reg, src: Mem); // load
+    fn emit_mov_r32_r32    (&mut self, dest: Reg, src: Reg);
+    fn emit_mov_mem32_r32  (&mut self, dest: Mem, src: Reg); // store
+    fn emit_mov_mem32_imm32(&mut self, dest: Mem, src: i32);
     
-    fn emit_sub_r64_r64(&mut self, dest: &P<Value>, src: &P<Value>);
-    fn emit_sub_r64_mem64(&mut self, dest: &P<Value>, src: &P<Value>);
-    fn emit_sub_r64_imm32(&mut self, dest: &P<Value>, src: i32);
+    fn emit_mov_r16_imm16  (&mut self, dest: Reg, src: i16);
+    fn emit_mov_r16_mem16  (&mut self, dest: Reg, src: Mem); // load
+    fn emit_mov_r16_r16    (&mut self, dest: Reg, src: Reg);
+    fn emit_mov_mem16_r16  (&mut self, dest: Mem, src: Reg); // store
+    fn emit_mov_mem16_imm16(&mut self, dest: Mem, src: i16);
+
+    fn emit_mov_r8_imm8    (&mut self, dest: Reg, src: i8);
+    fn emit_mov_r8_mem8    (&mut self, dest: Reg, src: Mem); // load
+    fn emit_mov_r8_r8      (&mut self, dest: Reg, src: Mem);
+    fn emit_mov_mem8_r8    (&mut self, dest: Mem, src: Reg); // store
+    fn emit_mov_mem8_imm8  (&mut self, dest: Mem, src: i8);
+
+    // lea
+    fn emit_lea_r64(&mut self, dest: Reg, src: Reg);
+
+    // and
+    fn emit_and_r64_imm32(&mut self, dest: Reg, src: i32);
+    fn emit_and_r64_r64  (&mut self, dest: Reg, src: Reg);
+    fn emit_and_r64_mem64(&mut self, dest: Reg, src: Mem);
+
+    fn emit_and_r32_imm32(&mut self, dest: Reg, src: i32);
+    fn emit_and_r32_r32  (&mut self, dest: Reg, src: Reg);
+    fn emit_and_r32_mem32(&mut self, dest: Reg, src: Mem);
+
+    fn emit_and_r16_imm16(&mut self, dest: Reg, src: i16);
+    fn emit_and_r16_r16  (&mut self, dest: Reg, src: Reg);
+    fn emit_and_r16_mem16(&mut self, dest: Reg, src: Mem);
+
+    fn emit_and_r8_imm8  (&mut self, dest: Reg, src: i8);
+    fn emit_and_r8_r8    (&mut self, dest: Reg, src: Reg);
+    fn emit_and_r8_mem8  (&mut self, dest: Reg, src: Mem);
+
+    // xor
+    fn emit_xor_r64_r64  (&mut self, dest: Reg, src: Reg);
+    fn emit_xor_r64_mem64(&mut self, dest: Reg, src: Mem);
+    fn emit_xor_r64_imm32(&mut self, dest: Reg, src: i32);
+
+    fn emit_xor_r32_r32  (&mut self, dest: Reg, src: Reg);
+    fn emit_xor_r32_mem32(&mut self, dest: Reg, src: Mem);
+    fn emit_xor_r32_imm32(&mut self, dest: Reg, src: i32);
+
+    fn emit_xor_r16_r16  (&mut self, dest: Reg, src: Reg);
+    fn emit_xor_r16_mem16(&mut self, dest: Reg, src: Reg);
+    fn emit_xor_r16_imm16(&mut self, dest: Reg, src: i16);
+
+    fn emit_xor_r8_r8    (&mut self, dest: Reg, src: Reg);
+    fn emit_xor_r8_mem8  (&mut self, dest: Reg, src: Reg);
+    fn emit_xor_r8_imm8  (&mut self, dest: Reg, src: i8);
+
+    // add
+    fn emit_add_r64_r64  (&mut self, dest: Reg, src: Reg);
+    fn emit_add_r64_mem64(&mut self, dest: Reg, src: Mem);
+    fn emit_add_r64_imm32(&mut self, dest: Reg, src: i32);
+
+    fn emit_add_r32_r32  (&mut self, dest: Reg, src: Reg);
+    fn emit_add_r32_mem32(&mut self, dest: Reg, src: Mem);
+    fn emit_add_r32_imm32(&mut self, dest: Reg, src: i32);
+
+    fn emit_add_r16_r16  (&mut self, dest: Reg, src: Reg);
+    fn emit_add_r16_mem16(&mut self, dest: Reg, src: Mem);
+    fn emit_add_r16_imm16(&mut self, dest: Reg, src: i16);
+
+    fn emit_add_r8_r8  (&mut self, dest: Reg, src: Reg);
+    fn emit_add_r8_mem8(&mut self, dest: Reg, src: Mem);
+    fn emit_add_r8_imm8(&mut self, dest: Reg, src: i8);
     
-    fn emit_mul_r64  (&mut self, src: &P<Value>);
-    fn emit_mul_mem64(&mut self, src: &P<Value>);
+    // sub
+    fn emit_sub_r64_r64  (&mut self, dest: Reg, src: Reg);
+    fn emit_sub_r64_mem64(&mut self, dest: Reg, src: Mem);
+    fn emit_sub_r64_imm32(&mut self, dest: Reg, src: i32);
+
+    fn emit_sub_r32_r32  (&mut self, dest: Reg, src: Reg);
+    fn emit_sub_r32_mem32(&mut self, dest: Reg, src: Mem);
+    fn emit_sub_r32_imm32(&mut self, dest: Reg, src: i32);
+
+    fn emit_sub_r16_r16  (&mut self, dest: Reg, src: Reg);
+    fn emit_sub_r16_mem16(&mut self, dest: Reg, src: Mem);
+    fn emit_sub_r16_imm16(&mut self, dest: Reg, src: i16);
+
+    fn emit_sub_r8_r8  (&mut self, dest: Reg, src: Reg);
+    fn emit_sub_r8_mem8(&mut self, dest: Reg, src: Mem);
+    fn emit_sub_r8_imm8(&mut self, dest: Reg, src: i8);
+
+    // floating point
+    fn emit_addsd_f64_f64  (&mut self, dest: Reg, src: Reg);
+    fn emit_addsd_f64_mem64(&mut self, dest: Reg, src: Mem);
+
+    // multiply
+    fn emit_mul_r64  (&mut self, src: Reg);
+    fn emit_mul_r32  (&mut self, src: Reg);
+    fn emit_mul_r16  (&mut self, src: Reg);
+    fn emit_mul_r8   (&mut self, src: Reg);
+
+    fn emit_mul_mem64(&mut self, src: Mem);
+    fn emit_mul_mem32(&mut self, src: Mem);
+    fn emit_mul_mem16(&mut self, src: Mem);
+    fn emit_mul_mem8 (&mut self, src: Mem);
+
+    // div
+    fn emit_div_r64   (&mut self, src: Reg);
+    fn emit_div_r32   (&mut self, src: Reg);
+    fn emit_div_r16   (&mut self, src: Reg);
+    fn emit_div_r8    (&mut self, src: Reg);
+
+    fn emit_div_mem64 (&mut self, src: Mem);
+    fn emit_div_mem32 (&mut self, src: Mem);
+    fn emit_div_mem16 (&mut self, src: Mem);
+    fn emit_div_mem8  (&mut self, src: Mem);
+
+    // idiv
+    fn emit_idiv_r64  (&mut self, src: Reg);
+    fn emit_idiv_r32  (&mut self, src: Reg);
+    fn emit_idiv_r16  (&mut self, src: Reg);
+    fn emit_idiv_r8   (&mut self, src: Reg);
 
-    fn emit_div_r64   (&mut self, src: &P<Value>);
-    fn emit_div_mem64 (&mut self, src: &P<Value>);
-    fn emit_idiv_r64  (&mut self, src: &P<Value>);
-    fn emit_idiv_mem64(&mut self, src: &P<Value>);
+    fn emit_idiv_mem64(&mut self, src: Mem);
+    fn emit_idiv_mem32(&mut self, src: Mem);
+    fn emit_idiv_mem16(&mut self, src: Mem);
+    fn emit_idiv_mem8 (&mut self, src: Mem);
+
+    // shl
+    fn emit_shl_r64_cl    (&mut self, dest: Reg);
+//    fn emit_shl_r32_cl    (&mut self, dest: Reg);
+//    fn emit_shl_r16_cl    (&mut self, dest: Reg);
+//    fn emit_shl_r8_cl     (&mut self, dest: Reg);
+
+    fn emit_shl_mem64_cl  (&mut self, dest: Mem);
+//    fn emit_shl_mem32_cl  (&mut self, dest: Mem);
+//    fn emit_shl_mem16_cl  (&mut self, dest: Mem);
+//    fn emit_shl_mem8_cl   (&mut self, dest: Mem);
+
+    fn emit_shl_r64_imm8  (&mut self, dest: Reg, src: i8);
+//    fn emit_shl_r32_imm8  (&mut self, dest: Reg, src: i8);
+//    fn emit_shl_r16_imm8  (&mut self, dest: Reg, src: i8);
+//    fn emit_shl_r8_imm8   (&mut self, dest: Reg, src: i8);
+
+    fn emit_shl_mem64_imm8(&mut self, dest: Mem, src: i8);
+//    fn emit_shl_mem32_imm8(&mut self, dest: Mem, src: i8);
+//    fn emit_shl_mem16_imm8(&mut self, dest: Mem, src: i8);
+//    fn emit_shl_mem8_imm8 (&mut self, dest: Mem, src: i8);
+
+    fn emit_shr_r64_cl    (&mut self, dest: &P<Value>);
+    fn emit_shr_mem64_cl  (&mut self, dest: &P<Value>);
+    fn emit_shr_r64_imm8  (&mut self, dest: &P<Value>, src: i8);
+    fn emit_shr_mem64_imm8(&mut self, dest: &P<Value>, src: i8);
+
+    fn emit_sar_r64_cl    (&mut self, dest: &P<Value>);
+    fn emit_sar_mem64_cl  (&mut self, dest: &P<Value>);
+    fn emit_sar_r64_imm8  (&mut self, dest: &P<Value>, src: i8);
+    fn emit_sar_mem64_imm8(&mut self, dest: &P<Value>, src: i8);
 
     fn emit_cqo(&mut self);
     
@@ -87,4 +230,10 @@ pub trait CodeGenerator {
     fn emit_push_r64(&mut self, src: &P<Value>);
     fn emit_push_imm32(&mut self, src: i32);
     fn emit_pop_r64(&mut self, dest: &P<Value>);
+
+    // fpr move
+
+    fn emit_movsd_f64_f64  (&mut self, dest: &P<Value>, src: &P<Value>);
+    fn emit_movsd_f64_mem64(&mut self, dest: &P<Value>, src: &P<Value>); // load
+    fn emit_movsd_mem64_f64(&mut self, dest: &P<Value>, src: &P<Value>); // store
 }
\ No newline at end of file

src/compiler/backend/arch/x86_64/mod.rs

@@ -62,14 +62,14 @@ lazy_static! {
     pub static ref R13 : P<Value> = GPR!(13,"r13");
     pub static ref R14 : P<Value> = GPR!(14,"r14");
     pub static ref R15 : P<Value> = GPR!(15,"r15");
-    
+
     pub static ref RIP : P<Value> = GPR!(32,"rip");
-    
+
     pub static ref RETURN_GPRs : [P<Value>; 2] = [
         RAX.clone(),
         RDX.clone(),
     ];
-    
+
     pub static ref ARGUMENT_GPRs : [P<Value>; 6] = [
         RDI.clone(),
         RSI.clone(),
@@ -78,7 +78,7 @@ lazy_static! {
         R8.clone(),
         R9.clone()
     ];
-    
+
     pub static ref CALLEE_SAVED_GPRs : [P<Value>; 6] = [
         RBX.clone(),
         RBP.clone(),
@@ -99,7 +99,7 @@ lazy_static! {
         R10.clone(),
         R11.clone()
     ];
-    
+
     pub static ref ALL_GPRs : [P<Value>; 15] = [
         RAX.clone(),
         RCX.clone(),
@@ -136,13 +136,13 @@ lazy_static!{
     pub static ref XMM12 : P<Value> = FPR!(28,"xmm12");
     pub static ref XMM13 : P<Value> = FPR!(29,"xmm13");
     pub static ref XMM14 : P<Value> = FPR!(30,"xmm14");
-    pub static ref XMM15 : P<Value> = FPR!(31,"xmm15"); 
-    
+    pub static ref XMM15 : P<Value> = FPR!(31,"xmm15");
+
     pub static ref RETURN_FPRs : [P<Value>; 2] = [
         XMM0.clone(),
         XMM1.clone()
     ];
-    
+
     pub static ref ARGUMENT_FPRs : [P<Value>; 8] = [
         XMM0.clone(),
         XMM1.clone(),
@@ -153,7 +153,7 @@ lazy_static!{
         XMM6.clone(),
         XMM7.clone()
     ];
-    
+
     pub static ref CALLEE_SAVED_FPRs : [P<Value>; 0] = [];
 
     pub static ref CALLER_SAVED_FPRs : [P<Value>; 16] = [
@@ -174,7 +174,7 @@ lazy_static!{
         XMM14.clone(),
         XMM15.clone(),
     ];
-    
+
     pub static ref ALL_FPRs : [P<Value>; 16] = [
         XMM0.clone(),
         XMM1.clone(),
@@ -234,10 +234,10 @@ lazy_static! {
         map.insert(XMM14.id(), XMM14.clone());
         map.insert(XMM15.id(), XMM15.clone());
         map.insert(RIP.id(), RIP.clone());
-        
+
         map
     };
-    
+
     // put caller saved regs first (they imposes no overhead if there is no call instruction)
     pub static ref ALL_USABLE_MACHINE_REGs : Vec<P<Value>> = vec![
         RAX.clone(),
@@ -279,7 +279,7 @@ pub fn init_machine_regs_for_func (func_context: &mut FunctionContext) {
     for reg in ALL_MACHINE_REGs.values() {
         let reg_id = reg.extract_ssa_id().unwrap();
         let entry = SSAVarEntry::new(reg.clone());
-        
+
         func_context.values.insert(reg_id, entry);
     }
 }
@@ -320,8 +320,8 @@ pub fn is_callee_saved(reg_id: MuID) -> bool {
             return true;
         }
     }
-    
-    false 
+
+    false
 }
 
 pub fn is_valid_x86_imm(op: &P<Value>) -> bool {
@@ -332,4 +332,4 @@ pub fn is_valid_x86_imm(op: &P<Value>) -> bool {
         },
         _ => false
     }
-}
+}
\ No newline at end of file

src/compiler/backend/mod.rs

@@ -171,3 +171,30 @@ pub struct BackendTypeInfo {
 
 #[derive(Clone, Copy, Debug, PartialEq, Eq, Hash, RustcEncodable, RustcDecodable)]
 pub enum RegGroup {GPR, FPR}
+
+impl RegGroup {
+    pub fn get(ty: &P<MuType>) -> RegGroup {
+        match ty.v {
+            // for now, only use 64bits registers
+            MuType_::Int(len) if len == 8  => RegGroup::GPR,
+            MuType_::Int(len) if len == 16 => RegGroup::GPR,
+            MuType_::Int(len) if len == 32 => RegGroup::GPR,
+            MuType_::Int(len) if len == 64 => RegGroup::GPR,
+
+            MuType_::Ref(_)
+            | MuType_::IRef(_)
+            | MuType_::WeakRef(_)
+            | MuType_::UPtr(_)
+            | MuType_::ThreadRef
+            | MuType_::StackRef
+            | MuType_::Tagref64
+            | MuType_::FuncRef(_)
+            | MuType_::UFuncPtr(_)         => RegGroup::GPR,
+
+            MuType_::Float                 => RegGroup::FPR,