Implemented Aarch64 compiler backend

build.rs

@@ -8,4 +8,25 @@ fn main() {
     gcc::Config::new().flag("-O3").flag("-c")
                      .file("src/runtime/swap_stack_x64_sysv.S")
                      .compile("libswap_stack.a"); 
+}
+
+#[cfg(target_os = "linux")]
+#[cfg(target_arch = "aarch64")]
+fn main() {
+    gcc::compile_library("libruntime.a", &["src/runtime/runtime_aarch64_sysv.c"]);
+
+    gcc::Config::new().flag("-O3").flag("-c")
+        .file("src/runtime/swap_stack_aarch64_sysv.S")
+        .compile("libswap_stack.a");
+}
+
+// This is here to enable cross compiling from windows/x86_64 to linux/aarch64
+#[cfg(target_os = "windows")]
+#[cfg(target_arch = "x86_64")]
+fn main() {
+    gcc::compile_library("libruntime.a", &["src/runtime/runtime_aarch64_sysv.c"]);
+
+    gcc::Config::new().flag("-O3").flag("-c")
+        .file("src/runtime/swap_stack_aarch64_sysv.S")
+        .compile("libswap_stack.a");
 }
\ No newline at end of file

src/ast/src/op.rs

@@ -186,21 +186,81 @@ pub enum CmpOp {
 }
 
 impl CmpOp {
+    // Returns the CmpOp c, such that (a self b) is equivelent to (b c a)
     pub fn swap_operands(self) -> CmpOp {
         use op::CmpOp::*;
         match self {
-            EQ => EQ,
-            NE => NE,
+            SGE => SLE,
+            SLE => SGE,
+            SGT => SLT,
+            SLT => SGT,
+
+            UGE => ULE,
+            ULE => UGE,
+            UGT => ULT,
+            ULT => UGT,
+
+            FOGE => FOLE,
+            FOLE => FOGE,
+            FOGT => FOLT,
+            FOLT => FOGT,
+
+            FUGE => FULE,
+            FULE => FUGE,
+            FUGT => FULT,
+            FULT => FUGT,
+
+            _ => self, // all other comparisons are reflexive
+        }
+    }
+    pub fn invert(self) -> CmpOp {
+        use op::CmpOp::*;
+        match self {
+            EQ => NE,
+            NE => EQ,
+
+            FOEQ => FUNE,
+            FUNE => FOEQ,
+
+            FUGE => FOLT,
+            FOLT => FUGE,
+
+            FUNO => FORD,
+            FORD => FUNO,
+
+            UGT => ULE,
+            ULE => UGT,
+
+            FUGT => FOLE,
+            FOLE => FUGT,
+
             SGE => SLT,
+            SLT => SGE,
+
+            FOGE => FULT,
+            FULT => FOGE,
+
             SGT => SLE,
             SLE => SGT,
-            SLT => SGE,
+
+            FOGT => FULE,
+            FULE => FOGT,
+
             UGE => ULT,
-            UGT => ULE,
-            ULE => UGT,
             ULT => UGE,
 
-            _ => unimplemented!()
+            FUEQ => FONE,
+            FONE => FUEQ,
+
+            FFALSE => FTRUE,
+            FTRUE => FFALSE,
+        }
+    }
+    pub fn is_signed(self) -> bool {
+        use op::CmpOp::*;
+        match self {
+            SGE | SLT | SGT | SLE => true,
+            _ => false
         }
     }
 }

src/ast/src/types.rs

@@ -32,7 +32,15 @@ lazy_static! {
     pub static ref UINT64_TYPE : P<MuType> = P(
         MuType::new(new_internal_id(), MuType_::int(64))
     );
-    
+
+    pub static ref UINT128_TYPE : P<MuType> = P(
+        MuType::new(new_internal_id(), MuType_::int(128))
+    );
+
+    pub static ref FLOAT_TYPE : P<MuType> = P(
+        MuType::new(new_internal_id(), MuType_::float())
+    );
+
     pub static ref DOUBLE_TYPE : P<MuType> = P(
         MuType::new(new_internal_id(), MuType_::double())
     );
@@ -48,6 +56,8 @@ lazy_static! {
         UINT16_TYPE.clone(),
         UINT32_TYPE.clone(),
         UINT64_TYPE.clone(),
+        UINT128_TYPE.clone(),
+        FLOAT_TYPE.clone(),
         DOUBLE_TYPE.clone(),
         VOID_TYPE.clone()
     ];    

src/compiler/backend/arch/aarch64/codegen.rs

+use ast::ptr::P;
+use ast::ir::*;
+use runtime::ValueLocation;
+
+use compiler::machine_code::MachineCode;
+use compiler::backend::{Reg, Mem};
+
+pub trait CodeGenerator {
+    fn start_code(&mut self, func_name: MuName, entry: MuName) -> ValueLocation;
+    fn finish_code(&mut self, func_name: MuName) -> (Box<MachineCode + Sync + Send>, ValueLocation);
+
+    // generate unnamed sequence of linear code (no branch)
+    fn start_code_sequence(&mut self);
+    fn finish_code_sequence(&mut self) -> Box<MachineCode + Sync + Send>;
+
+    fn print_cur_code(&self);
+
+    fn start_block(&mut self, block_name: MuName);
+    fn start_exception_block(&mut self, block_name: MuName) -> ValueLocation;
+    fn set_block_livein(&mut self, block_name: MuName, live_in: &Vec<P<Value>>);
+    fn set_block_liveout(&mut self, block_name: MuName, live_out: &Vec<P<Value>>);
+    fn end_block(&mut self, block_name: MuName);
+
+    // add CFI info
+    fn add_cfi_startproc(&mut self);
+    fn add_cfi_endproc(&mut self);
+    fn add_cfi_def_cfa_register(&mut self, reg: Reg);
+    fn add_cfi_def_cfa_offset(&mut self, offset: i32);
+    fn add_cfi_offset(&mut self, reg: Reg, offset: i32);
+
+    //==================================================================================================
+
+    // emit code to adjust frame
+    fn emit_frame_grow(&mut self); // Emits a SUB
+    fn emit_frame_shrink(&mut self); // Emits an ADD
+
+    // stack minimpulation
+    fn emit_push_pair(&mut self, src1: Reg, src2: Reg, stack: Reg); // Emits a STP
+    fn emit_pop_pair(&mut self, dest1: Reg, dest2: Reg, stack: Reg); // Emits a LDP
+
+
+    /* DON'T IMPLEMENT
+        SIMD instructions (unless they operate soley on GPRS or Dn, and Sn registers)
+    TODO: (maybye)
+        Other floating point instructions (that also operate on vectors)
+        (i've implemented all ones labeled as 'scalar')
+    (Other than those, all aarch64 instructions are implemented bellow)
+    (WAIT there are some strange loads and stores I may have missed)
+
+    (note the memory addreses shouyld be for a 64-bit access)e
+    PRFM (same adresesing moads as a normal load)
+        PRFM (<prfop>|#<imm5>), [<Xn|SP>{, #<pimm>}]
+        PRFM (<prfop>|#<imm5>), <label>
+        PRFM (<prfop>|#<imm5>), [<Xn|SP>, (<Wm>|<Xm>){, <extend> {<amount>}}]
+    PRFUM (<prfop>|#<imm5>), [<Xn|SP>{, #<simm>}]
+        prfop is a string (or an imm5)
+    PRFM    PRFM_imm
+
+    (also look at load / store unscaled)
+    CAS/b-h (ARMv8.1    (check if this will work on Wolf)
+    CASP
+
+    SWP/-b-h    (ARMv8.1 only)
+
+    LDADD/-b-h      Add
+    LDCLR/-b-h      Bit clear
+    LDEOR/-b-h           Exclusive Or
+    LDSET/-b-h      Set
+    LDMAX-b-h   signed maximum
+    LDMIN/b-h   sign minimum
+    LDUMAX/-b-h unsigned maximum
+    LDUMIN/-b-h unsigned minimum
+
+    STADD/-b-h   Add
+      STCLR/-b-h
+      STEOR/-b-h
+      STSET/-b-h
+      STMAX/-b-h
+      STMIN/-b-h
+      STUMAX/-b-h
+      STUMIN/-b-
+    NOTE:
+        with loads and stores the menmonic indicated may be given a suffix indicating the size and signenedness of the access
+        also b_cond's menmononic is 'B.cond'
+        all other instructions have the menmonic being the first word of the function name after emit_
+            (subsequent words are used to disambiguate different overloads)
+    */
+
+    // loads
+    fn emit_ldr(&mut self, dest: Reg, src: Mem, signed: bool);
+    //LDTR <Xt>, [<Xn|SP>{, #<simm>}]
+    fn emit_ldtr(&mut self, dest: Reg, src: Mem, signed: bool);
+    //LDUR <Xt>, [<Xn|SP>{, #<simm>}]
+    fn emit_ldur(&mut self, dest: Reg, src: Mem, signed: bool);
+    //LDXR <Xt>, [<Xn|SP>{,#0}]
+    fn emit_ldxr(&mut self, dest: Reg, src: Mem);
+    //LDAXR <Xt>, [<Xn|SP>{,#0}]
+    fn emit_ldaxr(&mut self, dest: Reg, src: Mem);
+    //LDAR <Xt>, [<Xn|SP>{,#0}]
+    fn emit_ldar(&mut self, dest: Reg, src: Mem);
+
+    // Load pair
+    //LDP <Xt1>, <Xt2>, [<Xn|SP>{, #simm7}]
+    //LDXP <Xt1>, <Xt2>, [<Xn|SP>{,#0}]
+    //LDAXP <Xt1>, <Xt2>, [<Xn|SP>{,#0}]
+    //LDNP <Xt1>, <Xt2>, [<Xn|SP>{, #simm7}]
+    fn emit_ldp(&mut self, dest1: Mem, dest2: Reg, src: Mem);
+    fn emit_ldxp(&mut self, dest1: Mem, dest2: Reg, src: Mem);
+    fn emit_ldaxp(&mut self, dest1: Mem, dest2: Reg, src: Mem);
+    fn emit_ldnp(&mut self, dest1: Mem, dest2: Reg, src: Mem);
+
+
+    // Stores
+
+    // TODO: Modify STXP, STLXP, STXR and STLXR
+    // WARNING: LDR and STR have a wider range of valid addresing modes than the other loads and stores (specifically atomics are base only)
+    // Note: for consistency the destination argument is placed first
+    // even though the output assembly code will have the src argument first
+    fn emit_str(&mut self, dest: Mem, src: Reg);
+
+    //STTR <Xt>, [<Xn|SP>{, #<simm>}]
+    //STUR <Xt>, [<Xn|SP>{, #<simm>}]
+    //STLR <Xt>, [<Xn|SP>{,#0}]
+    //STXR Ws, Rt, [Xn|SP]
+    //STLXR <Ws>, <Xt>, [<Xn|SP>{,#0}]
+    fn emit_sttr(&mut self, dest: Mem, src: Reg);
+    fn emit_stur(&mut self, dest: Mem, src: Reg);
+    fn emit_stlr(&mut self, dest: Mem, src: Reg);
+    fn emit_stxr(&mut self, dest: Mem, status: Reg, src: Reg);
+    fn emit_stlxr(&mut self, dest: Mem, status: Reg, src: Reg);
+
+    // Store Pairs
+    // STP <Xt1>, <Xt2>, [<Xn|SP>{, #simm7}]
+    // STXP <Ws>, <Xt1>, <Xt2>, [<Xn|SP>{,#0}]
+    // STLXP <Ws>, <Xt1>, <Xt2>, [<Xn|SP>{,#0}]
+    // STNP <Xt1>, <Xt2>, [<Xn|SP>{, #simm7}]
+    fn emit_stp(&mut self, dest: Mem, src1: Reg, src2: Reg);
+    fn emit_stxp(&mut self, dest: Mem, status: Reg, src1: Reg, src2: Reg);
+    fn emit_stlxp(&mut self, dest: Mem, status: Reg, src1: Reg, src2: Reg);
+    fn emit_stnp(&mut self, dest: Mem, src1: Reg, src2: Reg);
+
+    // branching
+
+    // calls
+    fn emit_bl(&mut self, callsite: String, func: MuName, pe: Option<MuName>) -> ValueLocation;
+    fn emit_blr(&mut self, callsite: String, func: Reg, pe: Option<MuName>) -> ValueLocation;
+
+    // Branches
+    fn emit_b(&mut self, dest_name: MuName);
+    fn emit_b_cond(&mut self, cond: &str, dest_name: MuName);
+    fn emit_br(&mut self, dest_address: Reg);
+    fn emit_ret(&mut self, src: Reg);
+    fn emit_cbnz(&mut self, src: Reg, dest_name: MuName);
+    fn emit_cbz(&mut self, src: Reg, dest_name: MuName);
+    fn emit_tbnz(&mut self, src1: Reg, src2: u8, dest_name: MuName);
+    fn emit_tbz(&mut self, src1: Reg, src2: u8, dest_name: MuName);
+
+    // Read and write flags
+    fn emit_msr(&mut self, dest: &str, src: Reg);
+    fn emit_mrs(&mut self, dest: Reg, src: &str);
+
+    // Address calculation
+    fn emit_adr(&mut self, dest: Reg, src: Reg);
+    fn emit_adrp(&mut self, dest: Reg, src: Reg);
+
+    // Unary ops
+    fn emit_mov(&mut self, dest: Reg, src: Reg);
+    fn emit_mvn(&mut self, dest: Reg, src: Reg);
+    fn emit_neg(&mut self, dest: Reg, src: Reg);
+    fn emit_negs(&mut self, dest: Reg, src: Reg);
+    fn emit_ngc(&mut self, dest: Reg, src: Reg);
+    fn emit_ngcs(&mut self, dest: Reg, src: Reg);
+    fn emit_sxtb(&mut self, dest: Reg, src: Reg);
+    fn emit_sxth(&mut self, dest: Reg, src: Reg);
+    fn emit_sxtw(&mut self, dest: Reg, src: Reg);
+    fn emit_uxtb(&mut self, dest: Reg, src: Reg);
+    fn emit_cls(&mut self, dest: Reg, src: Reg);
+    fn emit_clz(&mut self, dest: Reg, src: Reg);
+    fn emit_uxth(&mut self, dest: Reg, src: Reg);
+    fn emit_rbit(&mut self, dest: Reg, src: Reg);
+    fn emit_rev(&mut self, dest: Reg, src: Reg);
+    fn emit_rev16(&mut self, dest: Reg, src: Reg);
+    fn emit_rev32(&mut self, dest: Reg/*64*/, src: Reg);
+    fn emit_rev64(&mut self, dest: Reg/*64*/, src: Reg); // alias of REV
+    fn emit_fabs(&mut self, dest: Reg, src: Reg);
+    fn emit_fcvt(&mut self, dest: Reg, src: Reg);
+    fn emit_fcvtas(&mut self, dest: Reg, src: Reg);
+    fn emit_fcvtau(&mut self, dest: Reg, src: Reg);
+    fn emit_fcvtms(&mut self, dest: Reg, src: Reg);
+    fn emit_fcvtmu(&mut self, dest: Reg, src: Reg);
+    fn emit_fcvtns(&mut self, dest: Reg, src: Reg);
+    fn emit_fcvtnu(&mut self, dest: Reg, src: Reg);
+    fn emit_fcvtps(&mut self, dest: Reg, src: Reg);
+    fn emit_fcvtpu(&mut self, dest: Reg, src: Reg);
+    fn emit_fcvtzs(&mut self, dest: Reg, src: Reg);
+    fn emit_fcvtzu(&mut self, dest: Reg, src: Reg);
+    fn emit_fmov(&mut self, dest: Reg, src: Reg);
+    fn emit_fneg(&mut self, dest: Reg, src: Reg);
+    fn emit_frinta(&mut self, dest: Reg, src: Reg);
+    fn emit_frinti(&mut self, dest: Reg, src: Reg);
+    fn emit_frintm(&mut self, dest: Reg, src: Reg);
+    fn emit_frintn(&mut self, dest: Reg, src: Reg);
+    fn emit_frintp(&mut self, dest: Reg, src: Reg);
+    fn emit_frintx(&mut self, dest: Reg, src: Reg);
+    fn emit_frintz(&mut self, dest: Reg, src: Reg);
+    fn emit_fsqrt(&mut self, dest: Reg, src: Reg);
+    fn emit_scvtf(&mut self, dest: Reg, src: Reg);
+    fn emit_ucvtf(&mut self, dest: Reg, src: Reg);
+
+    // Unary operations with shift
+    fn emit_mov_shift(&mut self, dest: Reg, src: Reg, shift: &str, ammount: u8);
+    fn emit_mvn_shift(&mut self, dest: Reg, src: Reg, shift: &str, ammount: u8);
+    fn emit_neg_shift(&mut self, dest: Reg, src: Reg, shift: &str, ammount: u8);
+    fn emit_negs_shift(&mut self, dest: Reg, src: Reg, shift: &str, ammount: u8);
+
+    // Unary operations with immediates
+    fn emit_mov_imm(&mut self, dest: Reg, src: u64);
+    fn emit_movz(&mut self, dest: Reg, src: u16, shift: u8);
+    fn emit_movk(&mut self, dest: Reg, src: u16, shift: u8);
+    fn emit_movn(&mut self, dest: Reg, src: u16, shift: u8);
+    fn emit_movi(&mut self, dest: Reg, src: u64);
+    fn emit_fmov_imm(&mut self, dest: Reg, src: f32);
+
+    // Extended binary ops
+    fn emit_add_ext(&mut self, dest: Reg, src1: Reg, src2: Reg, signed: bool, shift: u8);
+    fn emit_adds_ext(&mut self, dest: Reg, src1: Reg, src2: Reg, signed: bool, shift: u8);
+    fn emit_sub_ext(&mut self, dest: Reg, src1: Reg, src2: Reg, signed: bool, shift: u8);
+    fn emit_subs_ext(&mut self, dest: Reg, src1: Reg, src2: Reg, signed: bool, shift: u8);
+
+    // Multiplication
+    fn emit_mul(&mut self, dest: Reg, src1: Reg, src2: Reg);
+    fn emit_mneg(&mut self, dest: Reg, src1: Reg, src2: Reg);
+    fn emit_smulh(&mut self, dest: Reg/*64*/, src1: Reg/*64*/, src2: Reg/*64*/);
+    fn emit_umulh(&mut self, dest: Reg/*64*/, src1: Reg/*64*/, src2: Reg/*64*/);
+    fn emit_smnegl(&mut self, dest: Reg/*64*/, src1: Reg/*32*/, src2: Reg/*32*/);
+    fn emit_smull(&mut self, dest: Reg/*64*/, src1: Reg/*32*/, src2: Reg/*32*/);
+    fn emit_umnegl(&mut self, dest: Reg/*64*/, src1: Reg/*32*/, src2: Reg/*32*/);
+    fn emit_umull(&mut self, dest: Reg/*64*/, src1: Reg/*32*/, src2: Reg/*32*/);
+
+    // Other binaries
+    fn emit_adc(&mut self, dest: Reg, src1: Reg, src2: Reg);
+    fn emit_adcs(&mut self, dest: Reg, src1: Reg, src2: Reg);
+    fn emit_add(&mut self, dest: Reg, src1: Reg, src2: Reg);
+    fn emit_adds(&mut self, dest: Reg, src1: Reg, src2: Reg);
+    fn emit_sbc(&mut self, dest: Reg, src1: Reg, src2: Reg);
+    fn emit_sbcs(&mut self, dest: Reg, src1: Reg, src2: Reg);
+    fn emit_sub(&mut self, dest: Reg, src1: Reg, src2: Reg);
+    fn emit_subs(&mut self, dest: Reg, src1: Reg, src2: Reg);
+    fn emit_sdiv(&mut self, dest: Reg, src1: Reg, src2: Reg);
+    fn emit_udiv(&mut self, dest: Reg, src1: Reg, src2: Reg);
+    fn emit_asr(&mut self, dest: Reg, src1: Reg, src2: Reg);
+    fn emit_lsl(&mut self, dest: Reg, src1: Reg, src2: Reg);
+    fn emit_lsr(&mut self, dest: Reg, src1: Reg, src2: Reg);
+    fn emit_ror(&mut self, dest: Reg, src1: Reg, src2: Reg);
+    fn emit_bic(&mut self, dest: Reg, src1: Reg, src2: Reg);
+    fn emit_bics(&mut self, dest: Reg, src1: Reg, src2: Reg);
+    fn emit_and(&mut self, dest: Reg, src1: Reg, src2: Reg);
+    fn emit_ands(&mut self, dest: Reg, src1: Reg, src2: Reg);
+    fn emit_eon(&mut self, dest: Reg, src1: Reg, src2: Reg);
+    fn emit_eor(&mut self, dest: Reg, src1: Reg, src2: Reg);
+    fn emit_orn(&mut self, dest: Reg, src1: Reg, src2: Reg);
+    fn emit_orr(&mut self, dest: Reg, src1: Reg, src2: Reg);
+    fn emit_fadd(&mut self, dest: Reg, src1: Reg, src2: Reg);
+    fn emit_fdiv(&mut self, dest: Reg, src1: Reg, src2: Reg);
+    fn emit_fmax(&mut self, dest: Reg, src1: Reg, src2: Reg);
+    fn emit_fmaxnm(&mut self, dest: Reg, src1: Reg, src2: Reg);
+    fn emit_fmin(&mut self, dest: Reg, src1: Reg, src2: Reg);
+    fn emit_fminm(&mut self, dest: Reg, src1: Reg, src2: Reg);
+    fn emit_fmul(&mut self, dest: Reg, src1: Reg, src2: Reg);
+    fn emit_fnmul(&mut self, dest: Reg, src1: Reg, src2: Reg);
+    fn emit_fsub(&mut self, dest: Reg, src1: Reg, src2: Reg);
+
+    // Binary operations with shift
+    fn emit_add_shift(&mut self, dest: Reg, src1: Reg, src2: Reg, shift: &str, amount: u8);
+    fn emit_adds_shift(&mut self, dest: Reg, src1: Reg, src2: Reg, shift: &str, amount: u8);
+    fn emit_sub_shift(&mut self, dest: Reg, src1: Reg, src2: Reg, shift: &str, amount: u8);
+    fn emit_subs_shift(&mut self, dest: Reg, src1: Reg, src2: Reg, shift: &str, amount: u8);
+    fn emit_bic_shift(&mut self, dest: Reg, src1: Reg, src2: Reg, shift: &str, amount: u8);
+    fn emit_bics_shift(&mut self, dest: Reg, src1: Reg, src2: Reg, shift: &str, amount: u8);
+    fn emit_and_shift(&mut self, dest: Reg, src1: Reg, src2: Reg, shift: &str, amount: u8);
+    fn emit_ands_shift(&mut self, dest: Reg, src1: Reg, src2: Reg, shift: &str, amount: u8);
+    fn emit_eon_shift(&mut self, dest: Reg, src1: Reg, src2: Reg, shift: &str, amount: u8);
+    fn emit_eor_shift(&mut self, dest: Reg, src1: Reg, src2: Reg, shift: &str, amount: u8);
+    fn emit_orn_shift(&mut self, dest: Reg, src1: Reg, src2: Reg, shift: &str, amount: u8);
+    fn emit_orr_shift(&mut self, dest: Reg, src1: Reg, src2: Reg, shift: &str, amount: u8);
+
+    // binary ops with immediates
+    fn emit_add_imm(&mut self, dest: Reg, src1: Reg, src2: u16, shift: bool);
+    fn emit_adds_imm(&mut self, dest: Reg, src1: Reg, src2: u16, shift: bool);
+    fn emit_sub_imm(&mut self, dest: Reg, src1: Reg, src2: u16, shift: bool);
+    fn emit_subs_imm(&mut self, dest: Reg, src1: Reg, src2: u16, shift: bool);
+
+    fn emit_and_imm(&mut self, dest: Reg, src1: Reg, src2: u64);
+    fn emit_ands_imm(&mut self, dest: Reg, src1: Reg, src2: u64);
+    fn emit_eor_imm(&mut self, dest: Reg, src1: Reg, src2: u64);
+    fn emit_orr_imm(&mut self, dest: Reg, src1: Reg, src2: u64);
+
+    fn emit_asr_imm(&mut self, dest: Reg, src1: Reg, src2: u8);
+    fn emit_lsr_imm(&mut self, dest: Reg, src1: Reg, src2: u8);
+    fn emit_lsl_imm(&mut self, dest: Reg, src1: Reg, src2: u8);
+    fn emit_ror_imm(&mut self, dest: Reg, src1: Reg, src2: u8);
+
+    // ternary ops
+
+    fn emit_madd(&mut self, dest: Reg, src1: Reg, src2: Reg, src3: Reg);
+    fn emit_msub(&mut self, dest: Reg, src1: Reg, src2: Reg, src3: Reg);
+    fn emit_smaddl(&mut self, dest: Reg/*64*/, src1: Reg/*32*/, src2: Reg/*32*/, src3: Reg/*64*/);
+    fn emit_smsubl(&mut self, dest: Reg/*64*/, src1: Reg/*32*/, src2: Reg/*32*/, src3: Reg/*64*/);
+    fn emit_umaddl(&mut self, dest: Reg/*64*/, src1: Reg/*32*/, src2: Reg/*32*/, src3: Reg/*64*/);
+    fn emit_umsubl(&mut self, dest: Reg/*64*/, src1: Reg/*32*/, src2: Reg/*32*/, src3: Reg/*64*/);
+    fn emit_fmadd(&mut self, dest: Reg, src1: Reg, src2: Reg, src3: Reg);
+    fn emit_fmsub(&mut self, dest: Reg, src1: Reg, src2: Reg, src3: Reg);
+    fn emit_fnmadd(&mut self, dest: Reg, src1: Reg, src2: Reg, src3: Reg);
+    fn emit_fnmsub(&mut self, dest: Reg, src1: Reg, src2: Reg, src3: Reg);
+
+    // Ternary ops with immediates
+    fn emit_bfm(&mut self, dest: Reg, src1: Reg, src2: u8, src3: u8);
+    fn emit_bfi(&mut self, dest: Reg, src1: Reg, src2: u8, src3: u8);
+    fn emit_bfxil(&mut self, dest: Reg, src1: Reg, src2: u8, src3: u8);
+    fn emit_ubfm(&mut self, dest: Reg, src1: Reg, src2: u8, src3: u8);
+    fn emit_ubfx(&mut self, dest: Reg, src1: Reg, src2: u8, src3: u8);
+    fn emit_ubfiz(&mut self, dest: Reg, src1: Reg, src2: u8, src3: u8);
+    fn emit_sbfm(&mut self, dest: Reg, src1: Reg, src2: u8, src3: u8);
+    fn emit_sbfx(&mut self, dest: Reg, src1: Reg, src2: u8, src3: u8);
+    fn emit_sbfiz(&mut self, dest: Reg, src1: Reg, src2: u8, src3: u8);
+
+    // Comparison (dosn't store a result, only updates flags)
+    fn emit_tst(&mut self, src1: Reg, src2: Reg);
+    fn emit_cmn(&mut self, src1: Reg, src2: Reg);
+    fn emit_cmp(&mut self, src1: Reg, src2: Reg);
+    fn emit_fcmp(&mut self, src1: Reg, src2: Reg);
+    fn emit_fcmpe(&mut self, src1: Reg, src2: Reg);
+
+    // Comparisons with extension
+    fn emit_cmn_ext(&mut self, src1: Reg, src2: Reg, signed: bool, shift: u8);
+    fn emit_cmp_ext(&mut self, src1: Reg, src2: Reg, signed: bool, shift: u8);
+
+    // Comparisons with shift
+    fn emit_tst_shift(&mut self, src1: Reg, src2: Reg, shift: &str, ammount: u8);
+    fn emit_cmn_shift(&mut self, src1: Reg, src2: Reg, shift: &str, ammount: u8);
+    fn emit_cmp_shift(&mut self, src1: Reg, src2: Reg, shift: &str, ammount: u8);
+
+    // Immediat Comparisons
+    fn emit_tst_imm(&mut self, src1: Reg, src2: u64);
+    fn emit_cmn_imm(&mut self, src1: Reg, src2: u16, shift : bool);
+    fn emit_cmp_imm(&mut self, src1: Reg, src2: u16, shift : bool);
+    
+    // Comparison against 0
+    fn emit_fcmp_0(&mut self, src: Reg);
+    fn emit_fcmpe_0(&mut self, src: Reg);
+
+    // Conditional ops
+    fn emit_cset(&mut self, dest: Reg, cond: &str);
+    fn emit_csetm(&mut self, dest: Reg, cond: &str);
+
+    // Conditional unary ops
+    fn emit_cinc(&mut self, dest: Reg, src: Reg, cond: &str);
+    fn emit_cneg(&mut self, dest: Reg, src: Reg, cond: &str);
+    fn emit_cinv(&mut self, dest: Reg, src: Reg, cond: &str);
+
+    // Conditional binary ops
+    fn emit_csel(&mut self, dest: Reg, src1: Reg, src2: Reg, cond: &str);
+    fn emit_csinc(&mut self, dest: Reg, src1: Reg, src2: Reg, cond: &str);
+    fn emit_csinv(&mut self, dest: Reg, src1: Reg, src2: Reg, cond: &str);
+    fn emit_csneg(&mut self, dest: Reg, src1: Reg, src2: Reg, cond: &str);
+    fn emit_fcsel(&mut self, dest: Reg, src1: Reg, src2: Reg, cond: &str);
+
+    // Conditional comparisons
+    fn emit_ccmn(&mut self, src1: Reg, src2: Reg, flags: u8, cond: &str);
+    fn emit_ccmp(&mut self, src1: Reg, src2: Reg, flags: u8, cond: &str);
+    fn emit_fccmp(&mut self, src1: Reg, src2: Reg, flags: u8, cond: &str);
+    fn emit_fccmpe(&mut self, src1: Reg, src2: Reg, flags: u8, cond: &str);
+
+    // Conditional comparisons (with immediate)
+    fn emit_ccmn_imm(&mut self, src1: Reg, src2: u8, flags: u8, cond: &str);
+    fn emit_ccmp_imm(&mut self, src1: Reg, src2: u8, flags: u8, cond: &str);
+
+    fn emit_bfc(&mut self, dest: Reg, src1: u8, src2: u8);
+    fn emit_extr(&mut self, dest: Reg, src1: Reg, src2: Reg, src3: u8);
+
+    // Synchronisation
+    fn emit_dsb(&mut self, option: &str);
+    fn emit_dmb(&mut self, option: &str);
+    fn emit_isb(&mut self, option: &str);
+    fn emit_clrex(&mut self);
+
+    // Hint instructions
+    fn emit_sevl(&mut self);
+    fn emit_sev(&mut self);
+    fn emit_wfe(&mut self);
+    fn emit_wfi(&mut self);
+    fn emit_yield(&mut self);
+    fn emit_nop(&mut self);
+    fn emit_hint(&mut self, val: u8);
+
+    // Debug instructions
+    fn emit_drps(&mut self);
+    fn emit_dcps1(&mut self, val: u16);
+    fn emit_dcps2(&mut self, val: u16);
+    fn emit_dcps3(&mut self, val: u16);
+
+    // System instruction
+    fn emit_dc(&mut self, option: &str, src: Reg);
+    fn emit_at(&mut self, option: &str, src: Reg);
+    fn emit_ic(&mut self, option: &str, src: Reg);
+    fn emit_tlbi(&mut self, option: &str, src: Reg);
+
+    fn emit_sys(&mut self, imm1: u8, cn: u8, cm: u8, imm2: u8, src: Reg);
+    fn emit_sysl(&mut self, dest: Reg, imm1: u8, cn: u8, cm: u8, imm2: u8);
+
+    // Exceptiuon instructions (NOTE: these will alter the PC)
+    fn emit_brk(&mut self, val: u16);
+    fn