[wip] refactoring the code so that register allocator is machine-independent

src/compiler/backend/mod.rs

 pub mod inst_sel;
+pub mod reg_alloc;
 
 #[cfg(target_arch = "x86_64")]
 mod x86_64;

src/compiler/backend/reg_alloc.rs

+use compiler::CompilerPass;
+use ast::ir::*;
+use vm::context::VMContext;
+
+pub struct RegisterAllocation {
+    name: &'static str
+}
+
+impl RegisterAllocation {
+    pub fn new() -> RegisterAllocation {
+        RegisterAllocation {
+            name: "Register Allcoation"
+        }
+    }
+}
+
+impl CompilerPass for RegisterAllocation {
+    fn name(&self) -> &'static str {
+        self.name
+    }
+    
+    #[allow(unused_variables)]
+    fn visit_function(&mut self, vm_context: &VMContext, func: &mut MuFunction) {
+        
+    }
+}
\ No newline at end of file

src/compiler/backend/x86_64/inst_sel.rs

@@ -377,6 +377,8 @@ impl <'a> InstructionSelection {
     fn emit_common_prologue(&mut self, args: &Vec<P<Value>>) {
         self.backend.start_block("prologue");
         
+        // TODO: push rbp, store rsp, etc.
+        
         // push all callee-saved registers
         for reg in x86_64::CALLEE_SAVED_GPRs.iter() {
             self.backend.emit_push_r64(&reg);

src/vm/compiled_func.rs

 use ast::ir::*;
+use ast::ptr::P;
 
 pub struct CompiledFunction {
     pub fn_name: MuTag,
+    pub mc: Box<MachineCode>
+}
+
+pub trait MachineCode {
+    fn number_of_insts(&self) -> usize;
+    fn is_move(&self, index: usize) -> bool;
+    
+    fn get_inst_reg_uses(&self, index: usize) -> Vec<MuID>;
+    fn get_inst_reg_defines(&self, index: usize) -> Vec<MuID>;
+    
+    fn get_reg_uses(&self, id: MuID) -> Vec<MuID>;
+    fn get_reg_defines(&self, id: MuID) -> Vec<MuID>;
 }
\ No newline at end of file

src/vm/mod.rs

 pub mod context;
 
 mod compiled_func;
-pub use vm::compiled_func::CompiledFunction;
\ No newline at end of file
+pub use vm::compiled_func::CompiledFunction;
+pub use vm::compiled_func::MachineCode;
\ No newline at end of file