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  1. 22 Aug, 2017 1 commit
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  20. 21 Feb, 2017 1 commit
  21. 16 Feb, 2017 1 commit
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  24. 07 Jan, 2017 1 commit
  25. 24 Nov, 2016 2 commits
  26. 23 Nov, 2016 1 commit
    • qinsoon's avatar
      fp add with two constants · 443d866a
      qinsoon authored
      currently mov constant as imm to a GPR, then mov from GPR
      to xmm. A better approach should be put the immediate in memroy,
      and load it
      443d866a
  27. 16 Nov, 2016 1 commit
  28. 15 Nov, 2016 1 commit
    • qinsoon's avatar
      start using 8/16/32 bits registers · 38d18dda
      qinsoon authored
      1. compiler knows all the registers
      2. but only 64bits register is a color (for reg alloc)
      3. backend records the length of GPR for each operand during instruction
      selection
      4. after reg alloc, when replacing temp with a color, find corresponding
      GPR for the length recorded before
      38d18dda
  29. 14 Nov, 2016 2 commits
  30. 11 Nov, 2016 1 commit
  31. 04 Nov, 2016 1 commit
    • qinsoon's avatar
      fib in test-jit runs · 5b723a45
      qinsoon authored
      1. grow/shrink frame size in the pro/epilogue. Note: though we removed
      push/pop for unused callee saved registers, we still reserve frame space
      for them. Because we generate spill on frame before we know exactly how
      large a space is. The solution is to make spill locations patchable.
      2. control flow will combine branches in switch instruction if they all
      target the same destination.
      5b723a45