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a jump that directly is directly followed by a label of its target
can be removed.

1. asm call do not use all argument registers (otherwise it will keep
them alive)
2. spilling a register that is used and defined in one instruction will
result in creating one new temporary, instead of two
3. spilling now deals with floating point
4. SELECT with int8 is implemented using conditional jump (cmov cannot
take reg8)
5. postcall convention now deals correctly with fp return values
6. reg alloc conservative() was wrong in a few commits ago, fixed it
7. in liveness analysis, when finding a move between a temp and a
register, find the color for the register (such as RAX for EAX)

currently mov constant as imm to a GPR, then mov from GPR
to xmm. A better approach should be put the immediate in memroy,
and load it

when we add interefence between %a and %edi, we also add %a with %rdi
because we cannot assign rdi to a

for movl %edi %edi (where two operands are actually %edi %rdi), we will
do a check, and ensure it get removed

changed a condition on coealescing. Fixed a bug in spilling rewrite.
Currently test_extern_Func is broken

was using nalgebra::DMatrix to implement a graph

1. see vm/vm_options.rs for usage and default values
2. added mu_fastimpl_new_with_opts under vm/api/api_impl/muvm.rs

introduced Move instruction at IR level.
Intermediate blocks will be inserted for multi-target branch
instructions

internally int1 is int8

1. compiler knows all the registers
2. but only 64bits register is a color (for reg alloc)
3. backend records the length of GPR for each operand during instruction
selection
4. after reg alloc, when replacing temp with a color, find corresponding
GPR for the length recorded before

currently we only use 64bit registers, extend/truncate result if it is
not 64bits. This is awful. Going to use all the registers, for example,
AL, AX, EAX, RAX, but will not use AH (so reg alloc is simpler)

Note: made two places in api implementation as unimplemented as
the instruction/type chnaged.

1. grow/shrink frame size in the pro/epilogue. Note: though we removed
push/pop for unused callee saved registers, we still reserve frame space
for them. Because we generate spill on frame before we know exactly how
large a space is. The solution is to make spill locations patchable.
2. control flow will combine branches in switch instruction if they all
target the same destination.