GitLab

1. see vm/vm_options.rs for usage and default values
2. added mu_fastimpl_new_with_opts under vm/api/api_impl/muvm.rs

refactoring; use SPAWN_PROC environment variable to determine whether to spawn child process or not. Not spawning child process may be able to provide clearer assertion fails

introduced Move instruction at IR level.
Intermediate blocks will be inserted for multi-target branch
instructions

internally int1 is int8

1. compiler knows all the registers
2. but only 64bits register is a color (for reg alloc)
3. backend records the length of GPR for each operand during instruction
selection
4. after reg alloc, when replacing temp with a color, find corresponding
GPR for the length recorded before

currently we only use 64bit registers, extend/truncate result if it is
not 64bits. This is awful. Going to use all the registers, for example,
AL, AX, EAX, RAX, but will not use AH (so reg alloc is simpler)