mu-impl-fast issueshttps://gitlab.anu.edu.au/mu/mu-impl-fast/-/issues2017-10-19T15:11:10+11:00https://gitlab.anu.edu.au/mu/mu-impl-fast/-/issues/90Register allocation with special registers2017-10-19T15:11:10+11:00Yi LinRegister allocation with special registersMy register allocator currently deals with special registers in the following way:
1. special registers are not `usable`, thus it cannot be assigned to a temporary.
1. coalescing will not combine special registers with temporaries (even ...My register allocator currently deals with special registers in the following way:
1. special registers are not `usable`, thus it cannot be assigned to a temporary.
1. coalescing will not combine special registers with temporaries (even if it is safe and optimal to do so)
We can make this cleaner by manipulating interferences with special registers, and let register allocator make the decision:
* make special registers alive at function exit, so it conflicts with all other temporaries, and register allocator won't assign it to any of the temporaries. But coalescing may combine temporaries with special registers if possible.
* to prevent coalescing in some cases, such as
```
mov SP -> t
add t, 8 -> t
```
we cannot coalesce SP with t. Otherwise changing t will also change the stack pointer. For a general case,
```
OP t, v -> u
```
if t cannot be coalesced with special register S, the instruction selector can generate code
```
mov t -> t0 (with def S)
OP t0, v -> u
```
this will add an interference edge between t0 and S, and prevent the coalescing.https://gitlab.anu.edu.au/mu/mu-impl-fast/-/issues/65More peephole optimisation rules2017-07-20T16:13:13+10:00Yi LinMore peephole optimisation rulesThis issue lists optimisations that we can do in peephole optimisations.
* [ ] a `jump-to-ret` can be replaced with `ret` directly (this would happen often for leaf functions)This issue lists optimisations that we can do in peephole optimisations.
* [ ] a `jump-to-ret` can be replaced with `ret` directly (this would happen often for leaf functions)https://gitlab.anu.edu.au/mu/mu-impl-fast/-/issues/52Use make_boot_image() for all Zebu tests2018-09-10T06:31:05+10:00Yi LinUse make_boot_image() for all Zebu testsDue to the fact that we didn't have `make_boot_image()` in early development, currently the tests are written in different ways for code generation and linking:
1. use `compile_to_sharedlib()` (as exposed in API, but not in the Mu spec) ...Due to the fact that we didn't have `make_boot_image()` in early development, currently the tests are written in different ways for code generation and linking:
1. use `compile_to_sharedlib()` (as exposed in API, but not in the Mu spec) to link generated code to a dynamic library
1. use `make_boot_image()` (as exposed in API) to link generated code to an executable
1. use `compile_fnc()` to link generated code to a dynamic library for *cargo tests*
1. manually compile code, persist vm, and link for *cargo tests*
Currently 1 and 2 are internally using `make_boot_image()`. But others are not.
Since `make_boot_image()` in Zebu allows generating dynamic library or executable (depends on output file name), we can make all the test use `make_boot_image()`. This will make the linking for all tests unified, and make it easy to make changes.https://gitlab.anu.edu.au/mu/mu-impl-fast/-/issues/50Capture stack overflow/underflow signal2018-09-10T06:31:05+10:00Yi LinCapture stack overflow/underflow signalWe are guarding pages above and below the Mu stack, thus an overflow/underflow would trigger a write/read protection. We should register handling to catch the signal, and identify its cause (overflow/underflow or other segfaults).We are guarding pages above and below the Mu stack, thus an overflow/underflow would trigger a write/read protection. We should register handling to catch the signal, and identify its cause (overflow/underflow or other segfaults).https://gitlab.anu.edu.au/mu/mu-impl-fast/-/issues/29Implement SWITCH with switch table2017-06-06T15:10:22+10:00Yi LinImplement SWITCH with switch tableCurrently the compiler generates cascading conditional branches for SWITCH instruction. We should consider using switch table if there are many case arms.Currently the compiler generates cascading conditional branches for SWITCH instruction. We should consider using switch table if there are many case arms.https://gitlab.anu.edu.au/mu/mu-impl-fast/-/issues/18Separating compilation information from IR data structures2017-06-10T10:28:39+10:00Yi LinSeparating compilation information from IR data structuresIt is poorly designed that the data structures for IR also contains information that is gradually generated during compilation, such as:
* `use_count` and `expr` in `SSAVarEntry`
* `block_trace` in `MuFunctionVersion`
* `exception_block...It is poorly designed that the data structures for IR also contains information that is gradually generated during compilation, such as:
* `use_count` and `expr` in `SSAVarEntry`
* `block_trace` in `MuFunctionVersion`
* `exception_blocks` in `FunctionContent`
* `control_flow` in `Block`
They are initially not available, and are generated during compilation. They can be safely destroyed after the compilation.
These compilation information should be stored separately from the IR.https://gitlab.anu.edu.au/mu/mu-impl-fast/-/issues/15Removing unnecessary use of lock/`Option` for IR data structures2017-05-19T14:32:29+10:00Yi LinRemoving unnecessary use of lock/`Option` for IR data structuresThis issue tracks unnecessary uses of locks in Zebu. The old Mu spec requires mutation on the IR, for example, creating a IR node, then adding a name to it. Thus either locks or `Option<T>` are introduced to allow mutation. The new spec ...This issue tracks unnecessary uses of locks in Zebu. The old Mu spec requires mutation on the IR, for example, creating a IR node, then adding a name to it. Thus either locks or `Option<T>` are introduced to allow mutation. The new spec makes the IR almost (if not completely) immutable. It is possible to remove most of the locks.
Some rewrite compilation passes try to mutate on IR nodes as well. However, we can always copy and update instead of mutating.
Lock:
* [x] `name` field in `MuEntityHeader`
* [x] `ops` field in `Instruction`
`Option<T>`:
* [ ] Most of the `Option` uses in `ir.rs`https://gitlab.anu.edu.au/mu/mu-impl-fast/-/issues/10Use higher byte of x86 16bits registers2017-06-14T00:06:06+10:00Yi LinUse higher byte of x86 16bits registersCurrently the register allocator only uses lower bytes of the aliased registers, AL/BL/CL/DL. The high byte (AH/BH/CH/DH) is wasted. Currently the register allocator only uses lower bytes of the aliased registers, AL/BL/CL/DL. The high byte (AH/BH/CH/DH) is wasted.