op.rs 9.82 KB
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// Copyright 2017 The Australian National University
// 
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// 
//     http://www.apache.org/licenses/LICENSE-2.0
// 
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.

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use ptr::P;
use types::*;
use inst::*;
use types::MuType_::*;
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#[derive(Copy, Clone, Debug, PartialEq)]
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#[allow(non_camel_case_types)]
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pub enum OpCode {
    // SSA
    RegI64,
    RegFP,
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    // Constant
    IntImmI64,
    FPImm,
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    // non-terminal
    Assign,
    Fence,
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    //terminal
    Return,
    ThreadExit,
    Throw,
    TailCall,
    Branch1,
    Branch2,
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    Select,
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    Watchpoint,
    WPBranch,
    Call,
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    CCall,
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    SwapStack,
    Switch,
    ExnInstruction,
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    // expression
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    Binary(BinOp),
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    BinaryWithStatus(BinOp),
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    Comparison(CmpOp),
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    Conversion(ConvOp),
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    AtomicRMW(AtomicRMWOp),

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    ExprCall,
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    ExprCCall,
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    Load,
    Store,
    CmpXchg,
    New,
    AllocA,
    NewHybrid,
    AllocAHybrid,
    NewStack,
    NewThread,
    NewThreadExn,
    NewFrameCursor,
    GetIRef,
    GetFieldIRef,
    GetElementIRef,
    ShiftIRef,
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    GetVarPartIRef,

    CommonInst_GetThreadLocal,
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    CommonInst_SetThreadLocal,
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    CommonInst_Pin,
    CommonInst_Unpin,
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    Move,
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    PrintHex,
    SetRetval
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}

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pub fn pick_op_code_for_ssa(ty: &P<MuType>) -> OpCode {
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    let a : &MuType = ty;
    match a.v {
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        // currently use i64 for all ints
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        Int(_) => OpCode::RegI64,
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        // currently do not differentiate float and double
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        Float
        | Double => OpCode::RegFP,
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        // ref and pointer types use RegI64
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        Ref(_)
        | IRef(_)
        | WeakRef(_)
        | UPtr(_)
        | ThreadRef
        | StackRef
        | Tagref64
        | FuncRef(_)
        | UFuncPtr(_) => OpCode::RegI64,
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        // we are not supposed to have these as SSA
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        Struct(_)
        | Array(_, _)
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        | Hybrid(_)
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        | Void => panic!("Not expecting {} as SSA", ty),
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        // unimplemented
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        Vector(_, _) => unimplemented!()
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    }
}

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pub fn pick_op_code_for_value(ty: &P<MuType>) -> OpCode {
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    let a : &MuType = ty;
    match a.v {
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        // currently use i64 for all ints
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        Int(_) => OpCode::IntImmI64,
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        // currently do not differentiate float and double
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        Float
        | Double => OpCode::FPImm,
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        // ref and pointer types use RegI64
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        Ref(_)
        | IRef(_)
        | WeakRef(_)
        | UPtr(_)
        | ThreadRef
        | StackRef
        | Tagref64
        | FuncRef(_)
        | UFuncPtr(_) => OpCode::IntImmI64,
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        // we are not supposed to have these as SSA
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        Struct(_)
        | Array(_, _)
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        | Hybrid(_)
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        | Void => unimplemented!(),
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        // unimplemented
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        Vector(_, _) => unimplemented!()
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    }
}

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#[derive(Copy, Clone, Debug, PartialEq)]
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pub enum BinOp {
    // Int(n) BinOp Int(n) -> Int(n)
    Add,
    Sub,
    Mul,
    Sdiv,
    Srem,
    Udiv,
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    Urem,
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    And,
    Or,
    Xor,
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    // Int(n) BinOp Int(m) -> Int(n)
    Shl,
    Lshr,
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    Ashr,
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    // FP BinOp FP -> FP
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    FAdd,
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    FSub,
    FMul,
    FDiv,
    FRem
}

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#[derive(Copy, Clone, Debug, PartialEq)]
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pub enum CmpOp {
    // for Int comparison
    EQ,
    NE,
    SGE,
    SGT,
    SLE,
    SLT,
    UGE,
    UGT,
    ULE,
    ULT,
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    // for FP comparison
    FFALSE,
    FTRUE,
    FOEQ,
    FOGT,
    FOGE,
    FOLT,
    FOLE,
    FONE,
    FORD,
    FUEQ,
    FUGT,
    FUGE,
    FULT,
    FULE,
    FUNE,
    FUNO
}

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impl CmpOp {
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    // Returns the CmpOp c, such that (a self b) is equivelent to (b c a)
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    pub fn swap_operands(self) -> CmpOp {
        use op::CmpOp::*;
        match self {
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            SGE => SLE,
            SLE => SGE,
            SGT => SLT,
            SLT => SGT,

            UGE => ULE,
            ULE => UGE,
            UGT => ULT,
            ULT => UGT,

            FOGE => FOLE,
            FOLE => FOGE,
            FOGT => FOLT,
            FOLT => FOGT,

            FUGE => FULE,
            FULE => FUGE,
            FUGT => FULT,
            FULT => FUGT,

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            _ => self, // all other comparisons are symmetric
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        }
    }
    pub fn invert(self) -> CmpOp {
        use op::CmpOp::*;
        match self {
            EQ => NE,
            NE => EQ,

            FOEQ => FUNE,
            FUNE => FOEQ,

            FUGE => FOLT,
            FOLT => FUGE,

            FUNO => FORD,
            FORD => FUNO,

            UGT => ULE,
            ULE => UGT,

            FUGT => FOLE,
            FOLE => FUGT,

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            SGE => SLT,
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            SLT => SGE,

            FOGE => FULT,
            FULT => FOGE,

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            SGT => SLE,
            SLE => SGT,
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            FOGT => FULE,
            FULE => FOGT,

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            UGE => ULT,
            ULT => UGE,

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            FUEQ => FONE,
            FONE => FUEQ,

            FFALSE => FTRUE,
            FTRUE => FFALSE,
        }
    }
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    // gets the unsigned version of the comparison
    pub fn get_unsigned(self) -> CmpOp {
        use op::CmpOp::*;
        match self {
            SGE => UGE,
            SLT => ULT,
            SGT => UGT,
            SLE => ULE,
            _   => self,
        }
    }
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    pub fn is_signed(self) -> bool {
        use op::CmpOp::*;
        match self {
            SGE | SLT | SGT | SLE => true,
            _ => false
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        }
    }
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    pub fn is_symmetric(self) -> bool {
        use op::CmpOp::*;
        match self {
            EQ | NE | FORD| FUNO| FUNE | FUEQ | FONE | FOEQ => true,
            _ => false
        }
    }
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}

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#[derive(Copy, Clone, Debug, PartialEq)]
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pub enum ConvOp {
    TRUNC,
    ZEXT,
    SEXT,
    FPTRUNC,
    FPEXT,
    FPTOUI,
    FPTOSI,
    UITOFP,
    SITOFP,
    BITCAST,
    REFCAST,
    PTRCAST
}

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#[derive(Copy, Clone, Debug, PartialEq)]
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pub enum AtomicRMWOp {
    XCHG,
    ADD,
    SUB,
    AND,
    NAND,
    OR,
    XOR,
    MAX,
    MIN,
    UMAX,
    UMIN
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}

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pub fn is_int_cmp(op: CmpOp) -> bool {
    match op {
        CmpOp::EQ
        | CmpOp::NE
        | CmpOp::SGE
        | CmpOp::SGT
        | CmpOp::SLE
        | CmpOp::SLT
        | CmpOp::UGE
        | CmpOp::UGT
        | CmpOp::ULE
        | CmpOp::ULT => true,
        _ => false
    }
}

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pub fn pick_op_code_for_inst(inst: &Instruction) -> OpCode {
    match inst.v {
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        Instruction_::BinOp(op, _, _)               => OpCode::Binary(op),
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        Instruction_::BinOpWithStatus(op, _, _, _)  => OpCode::BinaryWithStatus(op),
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        Instruction_::CmpOp(op, _, _)               => OpCode::Comparison(op),
        Instruction_::ConvOp{operation, ..}         => OpCode::Conversion(operation),
        Instruction_::AtomicRMW{op, ..}             => OpCode::AtomicRMW(op),
        Instruction_::ExprCall{..}                  => OpCode::ExprCall,
        Instruction_::ExprCCall{..}                 => OpCode::ExprCCall,
        Instruction_::Load{..}                      => OpCode::Load,
        Instruction_::Store{..}                     => OpCode::Store,
        Instruction_::CmpXchg{..}                   => OpCode::CmpXchg,
        Instruction_::New(_)                        => OpCode::New,
        Instruction_::AllocA(_)                     => OpCode::AllocA,
        Instruction_::NewHybrid(_, _)               => OpCode::NewHybrid,
        Instruction_::AllocAHybrid(_, _)            => OpCode::AllocAHybrid,
        Instruction_::NewStack(_)                   => OpCode::NewStack,
        Instruction_::NewThread(_, _)               => OpCode::NewThread,
        Instruction_::NewThreadExn(_, _)            => OpCode::NewThreadExn,
        Instruction_::NewFrameCursor(_)             => OpCode::NewFrameCursor,
        Instruction_::GetIRef(_)                    => OpCode::GetIRef,
        Instruction_::GetFieldIRef{..}              => OpCode::GetFieldIRef,
        Instruction_::GetElementIRef{..}            => OpCode::GetElementIRef,
        Instruction_::ShiftIRef{..}                 => OpCode::ShiftIRef,
        Instruction_::GetVarPartIRef{..}            => OpCode::GetVarPartIRef,
        Instruction_::Fence(_)                      => OpCode::Fence,
        Instruction_::Return(_)                     => OpCode::Return,
        Instruction_::ThreadExit                    => OpCode::ThreadExit,
        Instruction_::Throw(_)                      => OpCode::Throw,
        Instruction_::TailCall(_)                   => OpCode::TailCall,
        Instruction_::Branch1(_)                    => OpCode::Branch1,
        Instruction_::Branch2{..}                   => OpCode::Branch2,
        Instruction_::Select{..}                    => OpCode::Select,
        Instruction_::Watchpoint{..}                => OpCode::Watchpoint,
        Instruction_::WPBranch{..}                  => OpCode::WPBranch,
        Instruction_::Call{..}                      => OpCode::Call,
        Instruction_::CCall{..}                     => OpCode::CCall,
        Instruction_::SwapStack{..}                 => OpCode::SwapStack,
        Instruction_::Switch{..}                    => OpCode::Switch,
        Instruction_::ExnInstruction{..}            => OpCode::ExnInstruction,
        Instruction_::CommonInst_GetThreadLocal     => OpCode::CommonInst_GetThreadLocal,
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        Instruction_::CommonInst_SetThreadLocal(_)  => OpCode::CommonInst_SetThreadLocal,
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        Instruction_::CommonInst_Pin(_)             => OpCode::CommonInst_Pin,
        Instruction_::CommonInst_Unpin(_)           => OpCode::CommonInst_Unpin,
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        Instruction_::Move(_)                    => OpCode::Move,
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        Instruction_::PrintHex(_)                => OpCode::PrintHex,
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        Instruction_::SetRetval(_)               => OpCode::SetRetval
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    }
}