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Commit 1461e472 authored by qinsoon's avatar qinsoon

[wip] finish refactoring

parent 4a9a7ff9
......@@ -3,7 +3,6 @@ use ast::ir::*;
use runtime::ValueLocation;
use compiler::machine_code::MachineCode;
use compiler::backend::x86_64::ASMCodeGen;
pub trait CodeGenerator {
fn start_code(&mut self, func_name: MuName) -> ValueLocation;
use ast::ir::*;
use ast::ptr::*;
use vm::VM;
use compiler;
use compiler::CompilerPass;
use compiler::machine_code::CompiledFunction;
use compiler::PassExecutionResult;
use compiler::backend::init_machine_regs_for_func;
use compiler::backend;
......@@ -115,7 +115,8 @@ pub trait MachineCode {
fn set_ir_block_livein(&mut self, block: &str, set: Vec<MuID>);
fn set_ir_block_liveout(&mut self, block: &str, set: Vec<MuID>);
fn get_all_blocks(&self) -> &Vec<MuName>;
fn get_all_blocks(&self) -> Vec<MuName>;
// returns [start_inst, end_inst), inclusive at both end
fn get_block_range(&self, block: &str) -> Option<ops::Range<usize>>;
// functions for rewrite
......@@ -3,7 +3,6 @@ use ast::ptr::*;
use vm::VM;
use compiler::CompilerPass;
use std::sync::atomic::Ordering;
pub struct DefUse {
name: &'static str,
......@@ -6,8 +6,6 @@ use vm::VM;
use compiler::CompilerPass;
use compiler::PassExecutionResult;
use std::sync::atomic::Ordering;
pub struct TreeGen {
name: &'static str
......@@ -58,6 +58,8 @@ fn test_ir_liveness_fac() {
let block_1_liveout ="blk_1").unwrap();
let blk_1_v52 = vm.id_of("blk_1_v52");
trace!("lhs: {:?}", block_1_liveout);
trace!("rhs: {:?}", vec![blk_1_v52]);
assert!(vec_utils::is_identical_to_str_ignore_order(block_1_liveout, vec![blk_1_v52]));
// block 2
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