Commit 3a67a193 authored by qinsoon's avatar qinsoon

forgot emitting ireg for RetVal

parent 9f368125
Pipeline #566 passed with stages
in 58 minutes and 18 seconds
......@@ -1437,9 +1437,12 @@ impl <'a> InstructionSelection {
let ref ops = inst.ops;
let ref op = ops[index];
assert!(self.match_ireg(op));
let retval = self.emit_ireg(op, f_content, f_context, vm);
self.emit_runtime_entry(
&entrypoints::SET_RETVAL,
vec![op.clone_value()],
vec![retval],
None,
Some(node), f_content, f_context, vm
);
......
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