Commit 3bc38a25 authored by Isaac Oscar Gariano's avatar Isaac Oscar Gariano

Update ALLOCAHYBRID when length is not 64-bits

parent 97304444
Pipeline #713 failed with stages
in 28 minutes and 38 seconds
......@@ -2050,22 +2050,6 @@ impl CodeGenerator for ASMCodeGen {
)
}
fn emit_frame_shrink(&mut self) {
trace!("emit: \tframe shrink");
let asm = format!("ADD SP,SP,#{}; MOV SP, X29", FRAME_SIZE_PLACEHOLDER.clone());
let line = self.line();
self.cur_mut().add_frame_size_patchpoint(ASMLocation::new(line, 11, FRAME_SIZE_PLACEHOLDER_LEN, 0));
self.add_asm_inst(
asm,
linked_hashmap!{},
linked_hashmap!{},
false
)
}
fn emit_add_str(&mut self, dest: Reg, src1: Reg, src2: &str) {self.internal_binop_str("ADD", dest, src1, src2)}
// Pushes a pair of registers on the givne stack (uses the STP instruction)
......@@ -2113,12 +2097,6 @@ impl CodeGenerator for ASMCodeGen {
self.add_asm_inst_internal(asm, linked_hashmap!{}, linked_hashmap!{id1 => vec![loc1]}, false, ASMBranchTarget::Return, None);
}
fn emit_fake_ret(&mut self) {
trace!("emit: \tFAKE RET");
let asm = format!("\tMOV SP, X29\n\tLDP X29, X30,[SP],#16 \n\tRET X30\n");
self.add_asm_inst_internal(asm, linked_hashmap!{}, linked_hashmap!{}, false, ASMBranchTarget::Return, None);
}
fn emit_bl(&mut self, callsite: String, func: MuName, pe: Option<MuName>, is_native: bool) -> ValueLocation {
if is_native {
trace!("emit: \tBL /*C*/ {}", func);
......@@ -2165,11 +2143,11 @@ impl CodeGenerator for ASMCodeGen {
let asm = format!("B {}", mangle_name(dest_name.clone()));
self.add_asm_inst_internal(asm, linked_hashmap!{}, linked_hashmap!{}, false, ASMBranchTarget::Unconditional(dest_name), None);
}
fn emit_b_func(&mut self, dest_name: MuName)
fn emit_b_func(&mut self, func_name: MuName)
{
trace!("emit: \tB {}", dest_name);
trace!("emit: \tB {}", func_name);
let asm = format!("B {}", mangle_name(dest_name.clone()));
let asm = format!("B {}", mangle_name(func_name.clone()));
self.add_asm_inst_internal(asm, linked_hashmap!{}, linked_hashmap!{}, false, ASMBranchTarget::Return, None);
}
fn emit_b_cond(&mut self, cond: &str, dest_name: MuName)
......@@ -2190,11 +2168,11 @@ impl CodeGenerator for ASMCodeGen {
}
fn emit_br_func(&mut self, func_address: Reg)
{
trace!("emit: \tBR {}", dest_address);
trace!("emit: \tBR {}", func_address);
let (reg1, id1, loc1) = self.prepare_reg(dest_address, 2 + 1);
let (reg1, id1, loc1) = self.prepare_reg(func_address, 2 + 1);
let asm = format!("BR {}", reg1);
self.add_asm_inst_internal(asm, linked_hashmap!{}, linked_hashmap!{}, false, ASMBranchTarget::Return, None);
self.add_asm_inst_internal(asm, linked_hashmap!{}, linked_hashmap!{id1 => vec![loc1]}, false, ASMBranchTarget::Return, None);
}
fn emit_cbnz(&mut self, src: Reg, dest_name: MuName) { self.internal_branch_op("CBNZ", src, dest_name); }
fn emit_cbz(&mut self, src: Reg, dest_name: MuName) { self.internal_branch_op("CBZ", src, dest_name); }
......
......@@ -19,8 +19,6 @@ use compiler::machine_code::MachineCode;
use compiler::backend::{Reg, Mem};
pub trait CodeGenerator {
fn emit_fake_ret(&mut self);
fn start_code(&mut self, func_name: MuName, entry: MuName) -> ValueLocation;
fn finish_code(&mut self, func_name: MuName) -> (Box<MachineCode + Sync + Send>, ValueLocation);
......@@ -48,7 +46,6 @@ pub trait CodeGenerator {
// emit code to adjust frame
fn emit_frame_grow(&mut self); // Emits a SUB
fn emit_frame_shrink(&mut self); // Emits an ADD
// Used to pass a string that the assembler will interpret as an immediate argument
// (This is neccesary to support the use of ELF relocations like ':tprel_hi12:foo')
......
......@@ -1259,6 +1259,8 @@ impl <'a> InstructionSelection {
let align = lcm(ty_align, 16) as u64; // This is always going to be 16
assert!(align.is_power_of_two());
let var_len = self.emit_ireg(var_len, f_content, f_context, vm);
emit_zext(self.backend.as_mut(), &var_len);
let var_len = cast_value(&var_len, &UINT64_TYPE.clone());
// set res to the total size of the object (i.e. var_ty_size*var_len + fix_part_size)
emit_madd_u64_u64(self.backend.as_mut(), &res, &var_len, f_context, vm, var_ty_size as u64, fix_part_size as u64);
......@@ -3741,8 +3743,7 @@ impl <'a> InstructionSelection {
}
// Pop the frame record
self.backend.emit_frame_shrink();
//self.backend.emit_mov(&SP, &FP);
self.backend.emit_mov(&SP, &FP);
self.backend.emit_pop_pair(&FP, &LR, &SP);
// Note: the stack pointer should now be what it was when the function was called
......
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