Commit 4a6c8c47 authored by Isaac Oscar Gariano's avatar Isaac Oscar Gariano

Fixed bugs with calling and run rustfmt

parent fd067472
Pipeline #766 failed with stages
in 2 minutes and 13 seconds
// Copyright 2017 The Australian National University
//
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
//
// http://www.apache.org/licenses/LICENSE-2.0
//
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
......@@ -18,10 +18,12 @@ extern crate gcc;
#[cfg(target_arch = "x86_64")]
fn main() {
gcc::compile_library("libruntime_c.a", &["src/runtime/runtime_c_x64_sysv.c"]);
gcc::Config::new().flag("-O3").flag("-c")
.file("src/runtime/runtime_asm_x64_sysv.S")
.compile("libruntime_asm.a");
gcc::Config::new()
.flag("-O3")
.flag("-c")
.file("src/runtime/runtime_asm_x64_sysv.S")
.compile("libruntime_asm.a");
}
#[cfg(target_os = "linux")]
......@@ -29,7 +31,9 @@ fn main() {
fn main() {
gcc::compile_library("libruntime_c.a", &["src/runtime/runtime_c_aarch64_sysv.c"]);
gcc::Config::new().flag("-O3").flag("-c")
gcc::Config::new()
.flag("-O3")
.flag("-c")
.file("src/runtime/runtime_asm_aarch64_sysv.S")
.compile("libruntime_asm.a");
}
\ No newline at end of file
}
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......@@ -47,7 +47,7 @@ use utils::LinkedHashMap;
use std::collections::HashMap;
// number of normal callee saved registers (excluding RSP and RBP)
pub const CALLEE_SAVED_COUNT : usize = 5;
pub const CALLEE_SAVED_COUNT: usize = 5;
/// a macro to declare a set of general purpose registers that are aliased to the first one
macro_rules! GPR_ALIAS {
......@@ -250,8 +250,8 @@ pub fn check_op_len(op: &P<Value>) -> usize {
Some(64) => 64,
Some(32) => 32,
Some(16) => 16,
Some(8) => 8,
Some(1) => 8,
Some(8) => 8,
Some(1) => 8,
_ => panic!("unsupported register length for x64: {}", op.ty)
}
}
......@@ -320,7 +320,7 @@ lazy_static! {
];
}
pub const FPR_ID_START : usize = 100;
pub const FPR_ID_START: usize = 100;
lazy_static!{
// floating point registers, we use SSE registers
......@@ -496,7 +496,7 @@ lazy_static! {
}
/// creates context for each machine register in FunctionContext
pub fn init_machine_regs_for_func (func_context: &mut FunctionContext) {
pub fn init_machine_regs_for_func(func_context: &mut FunctionContext) {
for reg in ALL_MACHINE_REGS.values() {
let reg_id = reg.extract_ssa_id().unwrap();
let entry = SSAVarEntry::new(reg.clone());
......@@ -508,9 +508,9 @@ pub fn init_machine_regs_for_func (func_context: &mut FunctionContext) {
/// gets the number of registers in a certain register group
pub fn number_of_usable_regs_in_group(group: RegGroup) -> usize {
match group {
RegGroup::GPR => ALL_USABLE_GPRS.len(),
RegGroup::GPR => ALL_USABLE_GPRS.len(),
RegGroup::GPREX => ALL_USABLE_GPRS.len(),
RegGroup::FPR => ALL_USABLE_FPRS.len()
RegGroup::FPR => ALL_USABLE_FPRS.len()
}
}
......@@ -574,9 +574,9 @@ pub fn get_callee_saved_offset(reg: MuID) -> isize {
let id = if reg == RBX.id() {
0
} else {
(reg - R12.id())/4 + 1
(reg - R12.id()) / 4 + 1
};
(id as isize + 1)*(-8)
(id as isize + 1) * (-8)
}
/// is a machine register (by ID) callee saved?
......@@ -597,9 +597,8 @@ pub fn is_valid_x86_imm(op: &P<Value>) -> bool {
if op.ty.get_int_length().is_some() && op.ty.get_int_length().unwrap() <= 32 {
match op.v {
Value_::Constant(Constant::Int(val)) if val as i32 >= i32::MIN && val as i32 <= i32::MAX => {
true
},
Value_::Constant(Constant::Int(val))
if val as i32 >= i32::MIN && val as i32 <= i32::MAX => true,
_ => false
}
} else {
......@@ -615,49 +614,53 @@ pub fn estimate_insts_for_ir(inst: &Instruction) -> usize {
match inst.v {
// simple
BinOp(_, _, _) => 1,
BinOp(_, _, _) => 1,
BinOpWithStatus(_, _, _, _) => 2,
CmpOp(_, _, _) => 1,
ConvOp{..} => 0,
CmpOp(_, _, _) => 1,
ConvOp { .. } => 0,
// control flow
Branch1(_) => 1,
Branch2{..} => 1,
Select{..} => 2,
Watchpoint{..} => 1,
WPBranch{..} => 2,
Switch{..} => 3,
Branch1(_) => 1,
Branch2 { .. } => 1,
Select { .. } => 2,
Watchpoint { .. } => 1,
WPBranch { .. } => 2,
Switch { .. } => 3,
// call
ExprCall{..} | ExprCCall{..} | Call{..} | CCall{..} => 5,
Return(_) => 1,
ExprCall { .. } | ExprCCall { .. } | Call { .. } | CCall { .. } => 5,
Return(_) => 1,
TailCall(_) => 1,
// memory access
Load{..} | Store{..} => 1,
CmpXchg{..} => 1,
AtomicRMW{..} => 1,
AllocA(_) => 1,
AllocAHybrid(_, _) => 1,
Fence(_) => 1,
Load { .. } | Store { .. } => 1,
CmpXchg { .. } => 1,
AtomicRMW { .. } => 1,
AllocA(_) => 1,
AllocAHybrid(_, _) => 1,
Fence(_) => 1,
// memory addressing
GetIRef(_) | GetFieldIRef{..} | GetElementIRef{..} | ShiftIRef{..} | GetVarPartIRef{..} => 0,
GetIRef(_) |
GetFieldIRef { .. } |
GetElementIRef { .. } |
ShiftIRef { .. } |
GetVarPartIRef { .. } => 0,
// runtime call
New(_) | NewHybrid(_, _) => 10,
NewStack(_) | NewThread(_, _) | NewThreadExn(_, _) | NewFrameCursor(_) => 10,
ThreadExit => 10,
Throw(_) => 10,
SwapStack{..} => 10,
ThreadExit => 10,
Throw(_) => 10,
SwapStack { .. } => 10,
CommonInst_GetThreadLocal | CommonInst_SetThreadLocal(_) => 10,
CommonInst_Pin(_) | CommonInst_Unpin(_) => 10,
// others
Move(_) => 0,
PrintHex(_) => 10,
PrintHex(_) => 10,
SetRetval(_) => 10,
ExnInstruction{ref inner, ..} => estimate_insts_for_ir(&inner),
_ => unimplemented!(),
ExnInstruction { ref inner, .. } => estimate_insts_for_ir(&inner),
_ => unimplemented!()
}
}
// Copyright 2017 The Australian National University
//
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
//
// http://www.apache.org/licenses/LICENSE-2.0
//
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
......@@ -26,9 +26,9 @@ use std::fs::File;
use std::collections::HashMap;
/// should emit Mu IR dot graph?
pub const EMIT_MUIR : bool = true;
pub const EMIT_MUIR: bool = true;
/// should emit machien code dot graph?
pub const EMIT_MC_DOT : bool = true;
pub const EMIT_MC_DOT: bool = true;
pub struct CodeEmission {
name: &'static str
......@@ -66,7 +66,7 @@ impl CompilerPass for CodeEmission {
pub fn create_emit_directory(vm: &VM) {
use std::fs;
match fs::create_dir(&vm.vm_options.flag_aot_emit_dir) {
Ok(_) => {},
Ok(_) => {}
Err(_) => {}
}
}
......@@ -78,7 +78,13 @@ fn create_emit_file(name: String, vm: &VM) -> File {
file_path.push(name);
match File::create(file_path.as_path()) {
Err(why) => panic!("couldn't create emit file {}: {}", file_path.to_str().unwrap(), why),
Err(why) => {
panic!(
"couldn't create emit file {}: {}",
file_path.to_str().unwrap(),
why
)
}
Ok(file) => file
}
}
......@@ -92,7 +98,13 @@ pub fn emit_mu_types(suffix: &str, vm: &VM) {
file_path.push(&vm.vm_options.flag_aot_emit_dir);
file_path.push("___types".to_string() + suffix + ".muty");
let mut file = match File::create(file_path.as_path()) {
Err(why) => panic!("couldn't create mu types file {}: {}", file_path.to_str().unwrap(), why),
Err(why) => {
panic!(
"couldn't create mu types file {}: {}",
file_path.to_str().unwrap(),
why
)
}
Ok(file) => file
};
......@@ -107,12 +119,16 @@ pub fn emit_mu_types(suffix: &str, vm: &VM) {
if ty.is_struct() {
write!(file, "{}", ty).unwrap();
let struct_ty = struct_map.get(&ty.get_struct_hybrid_tag().unwrap()).unwrap();
let struct_ty = struct_map
.get(&ty.get_struct_hybrid_tag().unwrap())
.unwrap();
writeln!(file, " -> {}", struct_ty).unwrap();
writeln!(file, " {}", vm.get_backend_type_info(ty.id())).unwrap();
} else if ty.is_hybrid() {
write!(file, "{}", ty).unwrap();
let hybrid_ty = hybrid_map.get(&ty.get_struct_hybrid_tag().unwrap()).unwrap();
let hybrid_ty = hybrid_map
.get(&ty.get_struct_hybrid_tag().unwrap())
.unwrap();
writeln!(file, " -> {}", hybrid_ty).unwrap();
writeln!(file, " {}", vm.get_backend_type_info(ty.id())).unwrap();
} else {
......@@ -144,7 +160,7 @@ fn emit_mc_dot(func: &MuFunctionVersion, vm: &VM) {
let blocks = mc.get_all_blocks();
type DotID = usize;
let name_id_map : HashMap<MuName, DotID> = {
let name_id_map: HashMap<MuName, DotID> = {
let mut ret = HashMap::new();
let mut index = 0;
......@@ -159,7 +175,12 @@ fn emit_mc_dot(func: &MuFunctionVersion, vm: &VM) {
for block_name in blocks.iter() {
// BB [label = "
write!(file, "{} [label = \"{}:\\l\\l", id(block_name.clone()), block_name).unwrap();
write!(
file,
"{} [label = \"{}:\\l\\l",
id(block_name.clone()),
block_name
).unwrap();
for inst in mc.get_block_range(&block_name).unwrap() {
file.write_all(&mc.emit_inst(inst)).unwrap();
......@@ -173,8 +194,10 @@ fn emit_mc_dot(func: &MuFunctionVersion, vm: &VM) {
for block_name in blocks.iter() {
let end_inst = mc.get_block_range(block_name).unwrap().end;
for succ in mc.get_succs(mc.get_last_inst(end_inst).unwrap()).into_iter() {
match mc.get_block_for_inst(*succ) {
for succ in mc.get_succs(mc.get_last_inst(end_inst).unwrap())
.into_iter()
{
match mc.get_block_for_inst(*succ) {
Some(target) => {
let source_id = id(block_name.clone());
let target_id = id(target.clone());
......
// Copyright 2017 The Australian National University
//
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
//
// http://www.apache.org/licenses/LICENSE-2.0
//
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
......
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// Copyright 2017 The Australian National University
//
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
//
// http://www.apache.org/licenses/LICENSE-2.0
//
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
......@@ -55,33 +55,33 @@ impl PeepholeOptimization {
name: "Peephole Optimization"
}
}
fn remove_redundant_move(&mut self, inst: usize, cf: &mut CompiledFunction) {
// if this instruction is a move, and move from register to register (no memory operands)
if cf.mc().is_move(inst) && !cf.mc().is_using_mem_op(inst) {
cf.mc().trace_inst(inst);
// get source reg/temp ID
let src : MuID = {
let src: MuID = {
let uses = cf.mc().get_inst_reg_uses(inst);
if uses.len() == 0 {
// moving immediate to register, its not redundant
return;
}
}
uses[0]
};
// get dest reg/temp ID
let dst : MuID = cf.mc().get_inst_reg_defines(inst)[0];
let dst: MuID = cf.mc().get_inst_reg_defines(inst)[0];
// turning temp into machine reg
let src_machine_reg : MuID = {
let src_machine_reg: MuID = {
match cf.temps.get(&src) {
Some(reg) => *reg,
None => src
}
};
let dst_machine_reg : MuID = {
let dst_machine_reg: MuID = {
match cf.temps.get(&dst) {
Some(reg) => *reg,
None => dst
......@@ -90,7 +90,11 @@ impl PeepholeOptimization {
// check if two registers are aliased
if backend::is_aliased(src_machine_reg, dst_machine_reg) {
trace!("move between {} and {} is redundant! removed", src_machine_reg, dst_machine_reg);
trace!(
"move between {} and {} is redundant! removed",
src_machine_reg,
dst_machine_reg
);
// redundant, remove this move
cf.mc_mut().set_inst_nop(inst);
} else {
......@@ -115,7 +119,7 @@ impl PeepholeOptimization {
let opt_label = mc.is_label(inst + 1);
match opt_label {
Some(ref label) if dest == label => {
mc.set_inst_nop(inst);
mc.set_inst_nop(inst);
}
_ => {
// do nothing
......
// Copyright 2017 The Australian National University
//
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
//
// http://www.apache.org/licenses/LICENSE-2.0
//
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
......@@ -29,7 +29,7 @@ use compiler::backend::reg_alloc::validate;
use std::any::Any;
pub struct RegisterAllocation {
name: &'static str,
name: &'static str
}
impl CompilerPass for RegisterAllocation {
......@@ -49,7 +49,7 @@ impl CompilerPass for RegisterAllocation {
impl RegisterAllocation {
pub fn new() -> RegisterAllocation {
RegisterAllocation {
name: "Register Allocation",
name: "Register Allocation"
}
}
......@@ -92,23 +92,31 @@ impl RegisterAllocation {
// all the used callee saved registers
let used_callee_saved: Vec<MuID> = {
use std::collections::HashSet;
let used_callee_saved: HashSet<MuID> =
coloring.cf.temps.values()
.map(|x| *x)
.filter(|x| is_callee_saved(*x))
.collect();
let used_callee_saved: HashSet<MuID> = coloring
.cf
.temps
.values()
.map(|x| *x)
.filter(|x| is_callee_saved(*x))
.collect();
used_callee_saved.into_iter().collect()
};
// remove unused callee saved registers
let removed_callee_saved = coloring.cf.mc_mut().remove_unnecessary_callee_saved(used_callee_saved);
let removed_callee_saved = coloring
.cf
.mc_mut()
.remove_unnecessary_callee_saved(used_callee_saved);
for reg in removed_callee_saved {
coloring.cf.frame.remove_record_for_callee_saved_reg(reg);
}
// patch frame size
let frame_size = coloring.cf.frame.cur_size();
trace!("patching the code to grow/shrink size of {} bytes", frame_size);
trace!(
"patching the code to grow/shrink size of {} bytes",
frame_size
);
coloring.cf.mc_mut().patch_frame_size(frame_size);
}
......
// Copyright 2017 The Australian National University
//
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
//
// http://www.apache.org/licenses/LICENSE-2.0
//
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
......@@ -18,9 +18,9 @@ use ast::ir::*;
use compiler::machine_code::CompiledFunction;
pub struct ExactLiveness {
livein : LinkedHashMap<usize, LinkedHashSet<MuID>>,
livein: LinkedHashMap<usize, LinkedHashSet<MuID>>,
liveout: LinkedHashMap<usize, LinkedHashSet<MuID>>,
kill : LinkedHashMap<usize, LinkedHashSet<MuID>>
kill: LinkedHashMap<usize, LinkedHashSet<MuID>>
}
impl ExactLiveness {
......@@ -42,7 +42,8 @@ impl ExactLiveness {
for block in mc.get_all_blocks().iter() {
let range = mc.get_block_range(block).unwrap();
let mut liveout : LinkedHashSet<MuID> = LinkedHashSet::from_vec(mc.get_ir_block_liveout(block).unwrap().clone());
let mut liveout: LinkedHashSet<MuID> =
LinkedHashSet::from_vec(mc.get_ir_block_liveout(block).unwrap().clone());
for i in range.rev() {
// set liveout
......@@ -65,7 +66,7 @@ impl ExactLiveness {
// liveness analysis done
// compute 'kill': if a reg is in livein of an inst, but not liveout, it kills in the inst
for i in self.livein.keys() {
let mut kill : LinkedHashSet<MuID> = LinkedHashSet::new();
let mut kill: LinkedHashSet<MuID> = LinkedHashSet::new();
let livein = self.livein.get(i).unwrap();
let liveout = self.liveout.get(i).unwrap();
......@@ -86,7 +87,7 @@ impl ExactLiveness {
None => None
}
}
pub fn get_kills(&self, index: usize) -> Option<LinkedHashSet<MuID>> {
match self.kill.get(&index) {
Some(s) => Some(s.clone()),
......@@ -101,4 +102,4 @@ impl ExactLiveness {
trace!("kill: {:?}", self.kill.get(&index).unwrap());
}
}
}
\ No newline at end of file
}
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// Copyright 2017 The Australian National University
//
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
//
// http://www.apache.org/licenses/LICENSE-2.0
//
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
......
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