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Commit 62870f1f authored by qinsoon's avatar qinsoon

fix test_extern_func

when we add interefence between %a and %edi, we also add %a with %rdi
because we cannot assign rdi to a
parent 9a01d171
Pipeline #177 failed with stage
in 16 minutes and 22 seconds
......@@ -185,7 +185,7 @@ impl ASMCode {
// copy the block
let (name, block) = self.get_block_by_inst(i);
let mut new_block = ASMBlock{
let new_block = ASMBlock{
start_inst: cur_block_start,
end_inst: cur_block_end,
......
......@@ -163,7 +163,7 @@ pub fn get_alias_for_length(id: MuID, length: usize) -> P<Value> {
}
pub fn is_aliased(id1: MuID, id2: MuID) -> bool {
if get_color_for_precolroed(id1) == get_color_for_precolroed(id2) {
if get_color_for_precolored(id1) == get_color_for_precolored(id2) {
macro_rules! is_match {
($a1: expr, $a2: expr; $b: expr) => {
$a1 == $b.id() || $a2 == $b.id()
......@@ -186,7 +186,9 @@ pub fn is_aliased(id1: MuID, id2: MuID) -> bool {
}
}
pub fn get_color_for_precolroed(id: MuID) -> MuID {
pub fn get_color_for_precolored(id: MuID) -> MuID {
debug_assert!(id < MACHINE_ID_END);
if id < FPR_ID_START {
match GPR_ALIAS_LOOKUP.get(&id) {
Some(val) => val.id(),
......
......@@ -28,7 +28,7 @@ pub use compiler::backend::x86_64::init_machine_regs_for_func;
#[cfg(target_arch = "x86_64")]
pub use compiler::backend::x86_64::is_aliased;
#[cfg(target_arch = "x86_64")]
pub use compiler::backend::x86_64::get_color_for_precolroed;
pub use compiler::backend::x86_64::get_color_for_precolored;
#[cfg(target_arch = "x86_64")]
pub use compiler::backend::x86_64::number_of_regs_in_group;
#[cfg(target_arch = "x86_64")]
......
......@@ -97,6 +97,32 @@ impl InterferenceGraph {
pub fn add_interference_edge(&mut self, from: NodeIndex, to: NodeIndex) {
self.graph.update_edge(from, to, ());
// if one of the node is machine register, we also add
// interference edge to its alias
// e.g. if we have %a, %edi interferenced,
// we also add %a, %rdi interference
let from_tmp = self.graph.node_weight(from).unwrap().temp;
let to_tmp = self.graph.node_weight(to).unwrap().temp;
if from_tmp < MACHINE_ID_END || to_tmp < MACHINE_ID_END {
let from_tmp = if from_tmp < MACHINE_ID_END {
backend::get_color_for_precolored(from_tmp)
} else {
from_tmp
};
let to_tmp = if to_tmp < MACHINE_ID_END {
backend::get_color_for_precolored(to_tmp)
} else {
to_tmp
};
let from_tmp_node = self.get_node(from_tmp);
let to_tmp_node = self.get_node(to_tmp);
self.graph.update_edge(from_tmp_node, to_tmp_node, ());
}
}
pub fn is_interferenced_with(&self, node1: NodeIndex, node2: NodeIndex) -> bool {
......@@ -258,7 +284,7 @@ pub fn build_chaitin_briggs (cf: &mut CompiledFunction, func: &MuFunctionVersion
let reg_id = reg.extract_ssa_id().unwrap();
let node = ig.new_node(reg_id, &func.context);
let precolor = backend::get_color_for_precolroed(reg_id);
let precolor = backend::get_color_for_precolored(reg_id);
ig.color_node(node, precolor);
}
......
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