Commit 98f275bf authored by qinsoon's avatar qinsoon

remove some warnings

parent 03fc6f24
...@@ -616,7 +616,7 @@ impl <'a> InstructionSelection { ...@@ -616,7 +616,7 @@ impl <'a> InstructionSelection {
{ {
// mov op1 -> rax // mov op1 -> rax
let rax = x86_64::RAX.clone(); let rax = x86_64::RAX.clone();
self.emit_move_value_to_value(&rax, &op1.clone_value(), f_content, f_context, vm); self.emit_move_value_to_value(&rax, &op1.clone_value());
// xorq rdx, rdx -> rdx // xorq rdx, rdx -> rdx
let rdx = x86_64::RDX.clone(); let rdx = x86_64::RDX.clone();
...@@ -626,7 +626,7 @@ impl <'a> InstructionSelection { ...@@ -626,7 +626,7 @@ impl <'a> InstructionSelection {
if self.match_ireg(op2) { if self.match_ireg(op2) {
let reg_op2 = self.emit_ireg(op2, f_content, f_context, vm); let reg_op2 = self.emit_ireg(op2, f_content, f_context, vm);
self.backend.emit_div_r64(&op2.clone_value()); self.backend.emit_div_r64(&reg_op2.clone_value());
} else if self.match_mem(op2) { } else if self.match_mem(op2) {
let mem_op2 = self.emit_mem(op2); let mem_op2 = self.emit_mem(op2);
...@@ -653,7 +653,7 @@ impl <'a> InstructionSelection { ...@@ -653,7 +653,7 @@ impl <'a> InstructionSelection {
{ {
// mov op1 -> rax // mov op1 -> rax
let rax = x86_64::RAX.clone(); let rax = x86_64::RAX.clone();
self.emit_move_value_to_value(&rax, &op1.clone_value(), f_content, f_context, vm); self.emit_move_value_to_value(&rax, &op1.clone_value());
// cqo // cqo
self.backend.emit_cqo(); self.backend.emit_cqo();
...@@ -662,7 +662,7 @@ impl <'a> InstructionSelection { ...@@ -662,7 +662,7 @@ impl <'a> InstructionSelection {
if self.match_ireg(op2) { if self.match_ireg(op2) {
let reg_op2 = self.emit_ireg(op2, f_content, f_context, vm); let reg_op2 = self.emit_ireg(op2, f_content, f_context, vm);
self.backend.emit_idiv_r64(&op2.clone_value()); self.backend.emit_idiv_r64(&reg_op2.clone_value());
} else if self.match_mem(op2) { } else if self.match_mem(op2) {
let mem_op2 = self.emit_mem(op2); let mem_op2 = self.emit_mem(op2);
...@@ -1449,8 +1449,7 @@ impl <'a> InstructionSelection { ...@@ -1449,8 +1449,7 @@ impl <'a> InstructionSelection {
} }
} }
fn emit_move_value_to_value(&mut self, dest: &P<Value>, src: &P<Value>, f_content: &FunctionContent, f_context: &mut FunctionContext, vm: &VM) { fn emit_move_value_to_value(&mut self, dest: &P<Value>, src: &P<Value>) {
let ref dest_ty = dest.ty;
let ref src_ty = src.ty; let ref src_ty = src.ty;
if types::is_scalar(src_ty) && !types::is_fp(src_ty) { if types::is_scalar(src_ty) && !types::is_fp(src_ty) {
......
...@@ -625,6 +625,7 @@ impl <'a> GraphColoring<'a> { ...@@ -625,6 +625,7 @@ impl <'a> GraphColoring<'a> {
} }
} }
#[allow(unused_variables)]
fn rewrite_program(&mut self) { fn rewrite_program(&mut self) {
let spills = self.spills(); let spills = self.spills();
...@@ -641,6 +642,7 @@ impl <'a> GraphColoring<'a> { ...@@ -641,6 +642,7 @@ impl <'a> GraphColoring<'a> {
spilled_mem.insert(*reg_id, mem); spilled_mem.insert(*reg_id, mem);
} }
// though we are not using this right now
let new_temps = backend::spill_rewrite(&spilled_mem, self.func, self.cf, self.vm); let new_temps = backend::spill_rewrite(&spilled_mem, self.func, self.cf, self.vm);
} }
......
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