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basic-tests.uir 32.4 KB
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// require "primitives.uir"

.funcsig @binops32_sig = (@i32 @i32) -> ()
.funcdef @binops32 VERSION %v1 <@binops32_sig> {
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    %entry(<@i32> %p0 <@i32> %p1):
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        %add  = ADD  <@i32> %p0 %p1
        %sub  = SUB  <@i32> %p0 %p1
        %mul  = MUL  <@i32> %p0 %p1
        %udiv = UDIV <@i32> %p0 %p1
        %sdiv = SDIV <@i32> %p0 %p1
        %urem = UREM <@i32> %p0 %p1
        %srem = SREM <@i32> %p0 %p1
        %shl  = SHL  <@i32> %p0 %p1
        %lshr = LSHR <@i32> %p0 %p1
        %ashr = ASHR <@i32> %p0 %p1
        %and  = AND  <@i32> %p0 %p1
        %or   = OR   <@i32> %p0 %p1
        %xor  = XOR  <@i32> %p0 %p1
        
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        [%trap] TRAP <> KEEPALIVE (
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            %add %sub %mul %udiv %sdiv %urem %srem
            %shl %lshr %ashr %and %or %xor
            )
            
        COMMINST @uvm.thread_exit
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}

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.funcsig @binops64_sig = (@i64 @i64) -> ()
.funcdef @binops64 VERSION %v1 <@binops64_sig> {
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    %entry(<@i64> %p0 <@i64> %p1):
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        %add  = ADD  <@i64> %p0 %p1
        %sub  = SUB  <@i64> %p0 %p1
        %mul  = MUL  <@i64> %p0 %p1
        %udiv = UDIV <@i64> %p0 %p1
        %sdiv = SDIV <@i64> %p0 %p1
        %urem = UREM <@i64> %p0 %p1
        %srem = SREM <@i64> %p0 %p1
        %shl  = SHL  <@i64> %p0 %p1
        %lshr = LSHR <@i64> %p0 %p1
        %ashr = ASHR <@i64> %p0 %p1
        %and  = AND  <@i64> %p0 %p1
        %or   = OR   <@i64> %p0 %p1
        %xor  = XOR  <@i64> %p0 %p1
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        [%trap] TRAP <> KEEPALIVE (
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            %add %sub %mul %udiv %sdiv %urem %srem
            %shl %lshr %ashr %and %or %xor
            )
             
        COMMINST @uvm.thread_exit
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}

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.funcsig @binops64_div0_sig = (@i64 @i64 @i64 @i64 @i64) -> ()
.funcdef @binops64_div0 VERSION %v1 <@binops64_div0_sig> {
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    %entry(<@i64> %p0 <@i64> %p1 <@i64> %p2 <@i64> %p3 <@i64> %p4):
        %udiv = UDIV <@i64> %p0 %p1 EXC(%bb2(%p0 %p1 %p2 %p3 %p4) %exc())
    %bb2(<@i64> %p0 <@i64> %p1 <@i64> %p2 <@i64> %p3 <@i64> %p4):
        %sdiv = SDIV <@i64> %p0 %p2 EXC(%bb3(%p0 %p1 %p2 %p3 %p4) %exc())
    %bb3(<@i64> %p0 <@i64> %p1 <@i64> %p2 <@i64> %p3 <@i64> %p4):
        %urem = UREM <@i64> %p0 %p3 EXC(%bb4(%p0 %p1 %p2 %p3 %p4) %exc())
    %bb4(<@i64> %p0 <@i64> %p1 <@i64> %p2 <@i64> %p3 <@i64> %p4):
        %srem = SREM <@i64> %p0 %p4 EXC(%nor() %exc())

    %nor():
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        [%trapnor] TRAP <>
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        COMMINST @uvm.thread_exit

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    %exc():
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        [%trapexc] TRAP <>
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        COMMINST @uvm.thread_exit
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}

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.funcsig @binops_f_sig = (@float @float) -> ()
.funcdef @binops_f VERSION %v1 <@binops_f_sig> {
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    %entry(<@float> %p0 <@float> %p1):
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        %fadd = FADD <@float> %p0 %p1
        %fsub = FSUB <@float> %p0 %p1
        %fmul = FMUL <@float> %p0 %p1
        %fdiv = FDIV <@float> %p0 %p1
        %frem = FREM <@float> %p0 %p1
        
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        [%trap] TRAP <> KEEPALIVE (
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            %fadd %fsub %fmul %fdiv %frem
            )
        COMMINST @uvm.thread_exit
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}

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.funcsig @binops_d_sig = (@double @double) -> ()
.funcdef @binops_d VERSION %v1 <@binops_d_sig> {
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    %entry(<@double> %p0 <@double> %p1):
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        %fadd = FADD <@double> %p0 %p1
        %fsub = FSUB <@double> %p0 %p1
        %fmul = FMUL <@double> %p0 %p1
        %fdiv = FDIV <@double> %p0 %p1
        %frem = FREM <@double> %p0 %p1
        
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        [%trap] TRAP <> KEEPALIVE (
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            %fadd %fsub %fmul %fdiv %frem
            )
        COMMINST @uvm.thread_exit
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}

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.funcsig @binops_vec_sig = (@4xi32 @4xi32 @4xfloat @4xfloat @2xdouble @2xdouble) -> ()
.funcdef @binops_vec VERSION %v1 <@binops_vec_sig> {
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    %entry(<@4xi32> %p0 <@4xi32> %p1 <@4xfloat> %p2 <@4xfloat> %p3 <@2xdouble> %p4 <@2xdouble> %p5):
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        %addi = ADD  <@4xi32>    %p0 %p1
        %subi = SUB  <@4xi32>    %p0 %p1
        %addf = FADD <@4xfloat>  %p2 %p3
        %subf = FSUB <@4xfloat>  %p2 %p3
        %addd = FADD <@2xdouble> %p4 %p5
        %subd = FSUB <@2xdouble> %p4 %p5

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        [%trap] TRAP <> KEEPALIVE (
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            %addi %subi %addf %subf %addd %subd
            )
        COMMINST @uvm.thread_exit

}

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.funcsig @cmp64_sig = (@i64 @i64) -> ()
.funcdef @cmp64 VERSION %v1 <@cmp64_sig> {
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    %entry(<@i64> %p0 <@i64> %p1):
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        %eq  = EQ  <@i64> %p0 %p1
        %ne  = NE  <@i64> %p0 %p1
        %ult = ULT <@i64> %p0 %p1
        %ule = ULE <@i64> %p0 %p1
        %ugt = UGT <@i64> %p0 %p1
        %uge = UGE <@i64> %p0 %p1
        %slt = SLT <@i64> %p0 %p1
        %sle = SLE <@i64> %p0 %p1
        %sgt = SGT <@i64> %p0 %p1
        %sge = SGE <@i64> %p0 %p1
        
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        [%trap] TRAP <> KEEPALIVE (
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            %eq %ne %ult %ule %ugt %uge %slt %sle %sgt %sge
            )
        COMMINST @uvm.thread_exit
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}

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.funcsig @cmp_f_sig = (@float @float) -> ()
.funcdef @cmp_f VERSION %v1 <@cmp_f_sig> {
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    %entry(<@float> %p0 <@float> %p1):
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        %ftrue  = FTRUE  <@float> %p0 %p1
        %ffalse = FFALSE <@float> %p0 %p1
        %ford   = FORD   <@float> %p0 %p1
        %foeq   = FOEQ   <@float> %p0 %p1
        %fone   = FONE   <@float> %p0 %p1
        %folt   = FOLT   <@float> %p0 %p1
        %fole   = FOLE   <@float> %p0 %p1
        %fogt   = FOGT   <@float> %p0 %p1
        %foge   = FOGE   <@float> %p0 %p1
        %funo   = FUNO   <@float> %p0 %p1
        %fueq   = FUEQ   <@float> %p0 %p1
        %fune   = FUNE   <@float> %p0 %p1
        %fult   = FULT   <@float> %p0 %p1
        %fule   = FULE   <@float> %p0 %p1
        %fugt   = FUGT   <@float> %p0 %p1
        %fuge   = FUGE   <@float> %p0 %p1
    
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        [%trap] TRAP <> KEEPALIVE (
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            %ftrue %ffalse %ford %foeq %fone %folt %fole %fogt %foge
            %funo %fueq %fune %fult %fule %fugt %fuge
            )
        COMMINST @uvm.thread_exit
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}

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.funcsig @cmp_d_sig = (@double @double) -> ()
.funcdef @cmp_d VERSION %v1 <@cmp_d_sig> {
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    %entry(<@double> %p0 <@double> %p1):
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        %ftrue  = FTRUE  <@double> %p0 %p1
        %ffalse = FFALSE <@double> %p0 %p1
        %ford   = FORD   <@double> %p0 %p1
        %foeq   = FOEQ   <@double> %p0 %p1
        %fone   = FONE   <@double> %p0 %p1
        %folt   = FOLT   <@double> %p0 %p1
        %fole   = FOLE   <@double> %p0 %p1
        %fogt   = FOGT   <@double> %p0 %p1
        %foge   = FOGE   <@double> %p0 %p1
        %funo   = FUNO   <@double> %p0 %p1
        %fueq   = FUEQ   <@double> %p0 %p1
        %fune   = FUNE   <@double> %p0 %p1
        %fult   = FULT   <@double> %p0 %p1
        %fule   = FULE   <@double> %p0 %p1
        %fugt   = FUGT   <@double> %p0 %p1
        %fuge   = FUGE   <@double> %p0 %p1
    
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        [%trap] TRAP <> KEEPALIVE (
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            %ftrue %ffalse %ford %foeq %fone %folt %fole %fogt %foge
            %funo %fueq %fune %fult %fule %fugt %fuge
            )
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        COMMINST @uvm.thread_exit
}

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.funcsig @cmp_vec_sig = (@4xi32 @4xi32 @4xfloat @4xfloat @2xdouble @2xdouble) -> ()
.funcdef @cmp_vec VERSION %v1 <@cmp_vec_sig> {
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    %entry(<@4xi32> %p0 <@4xi32> %p1 <@4xfloat> %p2 <@4xfloat> %p3 <@2xdouble> %p4 <@2xdouble> %p5):
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        %eq      = EQ   <@4xi32>    %p0 %p1
        %slt     = SLT  <@4xi32>    %p0 %p1
        %foeqf   = FOEQ <@4xfloat>  %p2 %p3
        %fultf   = FULT <@4xfloat>  %p2 %p3
        %foeqd   = FOEQ <@2xdouble> %p4 %p5
        %fultd   = FULT <@2xdouble> %p4 %p5

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        [%trap] TRAP <> KEEPALIVE (
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            %eq %slt %foeqf %fultf %foeqd %fultd
            )
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        COMMINST @uvm.thread_exit
}
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.global @dummy_global1 <@i64>
.global @dummy_global2 <@i64>

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.funcdecl @dummy_func1 <@v_v>
.funcdef @dummy_func2 VERSION %v1 <@v_v> {
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    %entry():
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        RET ()
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}

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.funcsig @cmp_ref_sig = (@refi64 @refi64 @irefi64 @irefi64 @frv_v @frv_v @stack @stack) -> ()
.funcdef @cmp_ref VERSION %v1 <@cmp_ref_sig> {
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    %entry(<@refi64> %p0 <@refi64> %p1 <@irefi64> %p2 <@irefi64> %p3
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           <@frv_v> %p4 <@frv_v> %p5 <@stack> %p6 <@stack> %p7):
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        %req     = EQ   <@refi64>   %p0 %p1
        %rne     = NE   <@refi64>   %p0 %p1
        %ieq     = EQ   <@irefi64>  %p2 %p3
        %ine     = NE   <@irefi64>  %p2 %p3
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        %feq     = EQ   <@frv_v>    %p4 %p5
        %fne     = NE   <@frv_v>    %p4 %p5
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        %seq     = EQ   <@stack>    %p6 %p7
        %sne     = NE   <@stack>    %p6 %p7

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        [%trap] TRAP <> KEEPALIVE (
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            %req %rne %ieq %ine %feq %fne %seq %sne
            )
        COMMINST @uvm.thread_exit
}

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.funcsig @conv_sig = (@i32 @i64 @float @double) -> ()
.funcdef @conv VERSION %v1 <@conv_sig> {
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    %entry(<@i32> %p0 <@i64> %p1 <@float> %p2 <@double> %p3):
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        %trunc = TRUNC <@i64 @i32> %p1
        %zext  = ZEXT  <@i32 @i64> %p0
        %sext  = SEXT  <@i32 @i64> %p0
        
        %fptrunc = FPTRUNC <@double @float> %p3
        %fpext   = FPEXT   <@float @double> %p2
        
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        %fptoui1 = FPTOUI  <@double @i64> %p3
        %fptosi1 = FPTOSI  <@double @i64> %p3
        %fptoui2 = FPTOUI  <@float @i32> %p2
        %fptosi2 = FPTOSI  <@float @i32> %p2
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        %uitofp  = UITOFP  <@i64 @double> %p1
        %sitofp  = SITOFP  <@i64 @double> %p1
        
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        %bitcast1 = BITCAST <@float  @i32> %p2
        %bitcast2 = BITCAST <@double @i64> %p3
        %bitcast3 = BITCAST <@i32 @float > %bitcast1
        %bitcast4 = BITCAST <@i64 @double> %bitcast2
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        %ptrcast1 = PTRCAST <@i64 @ptrvoid> %p1
        %ptrcast2 = PTRCAST <@ptrvoid @fpi_i> %ptrcast1
        %ptrcast3 = PTRCAST <@fpi_i @i64> %ptrcast2
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        // Testing constants.
        %ptrcast4 = PTRCAST <@ptrvoid @i64> @PTRVOID_DUMMY1
        %ptrcast5 = PTRCAST <@fpi_i @ptrvoid> @FPI_I_DUMMY2
        %ptrcast6 = PTRCAST <@ptrvoid @i32> @PTRVOID_DUMMY1
        
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        [%trap] TRAP <> KEEPALIVE (
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            %trunc %zext %sext %fptrunc %fpext
            %fptoui1 %fptosi1 %fptoui2 %fptosi2 %uitofp %sitofp
            %bitcast1 %bitcast2 %bitcast3 %bitcast4
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            %ptrcast1 %ptrcast2 %ptrcast3 %ptrcast4 %ptrcast5 %ptrcast6
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            )
        COMMINST @uvm.thread_exit
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}

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.funcsig @conv_vec_sig = (@4xi32 @4xfloat @2xdouble) -> ()
.funcdef @conv_vec VERSION %v1 <@conv_vec_sig> {
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    %entry(<@4xi32> %p0 <@4xfloat> %p1 <@2xdouble> %p2):
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        %trunc = TRUNC <@4xi32 @4xi16> %p0
        %zext  = ZEXT  <@4xi32 @4xi64> %p0
        %sext  = SEXT  <@4xi32 @4xi64> %p0
        
        %fptrunc = FPTRUNC <@2xdouble @2xfloat> %p2
        %fpext   = FPEXT   <@4xfloat @4xdouble> %p1

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        [%trap] TRAP <> KEEPALIVE (
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            %trunc %zext %sext %fptrunc %fpext
            )
        COMMINST @uvm.thread_exit
}


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.const @4xI1_COND <@4xi1> = {@TRUE @FALSE @FALSE @TRUE}
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.funcdef @select VERSION %v1 <@v_v> {
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    %entry():
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        %sel1 = SELECT <@i1 @i64> @TRUE  @I64_2 @I64_3
        %sel2 = SELECT <@i1 @i64> @FALSE @I64_2 @I64_3

        %sel3 = SELECT <@4xi1 @4xi32> @4xI1_COND @4xI32_V1 @4xI32_V2

        %sel4 = SELECT <@i1 @4xi32> @TRUE  @4xI32_V1 @4xI32_V2
        %sel5 = SELECT <@i1 @4xi32> @FALSE @4xI32_V1 @4xI32_V2
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        [%trap] TRAP <> KEEPALIVE (
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            %sel1 %sel2 %sel3 %sel4 %sel5
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            )
        COMMINST @uvm.thread_exit
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}

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.funcsig @branch_sig = (@i64) -> ()
.funcdef @branch VERSION %v1 <@branch_sig> {
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    %entry(<@i64> %p0):
        BRANCH %head(%p0)
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    %head(<@i64> %p0):
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        %cmpz = EQ <@i64> %p0 @I64_0
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        BRANCH2 %cmpz %iftrue() %iffalse()
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    %iftrue():
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        [%traptrue] TRAP <>
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        COMMINST @uvm.thread_exit
        
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    %iffalse():
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        [%trapfalse] TRAP <>
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        COMMINST @uvm.thread_exit
}


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.funcsig @switch_sig = (@i64) -> ()
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.funcdef @switch VERSION %v1 <@switch_sig> {
    %entry(<@i64> %p0):
        SWITCH <@i64> %p0 %def() {
            @I64_1 %one()
            @I64_2 %two()
            @I64_3 %three()
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        }
        
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    %def():
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        [%trapdef] TRAP <> EXC(%exit(@I64_4) %exit(@I64_4))
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    %one():                                                      
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        [%trapone] TRAP <> EXC(%exit(@I64_5) %exit(@I64_5))
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    %two():                                                      
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        [%traptwo] TRAP <> EXC(%exit(@I64_6) %exit(@I64_6))
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    %three():                                                    
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        [%trapthree] TRAP <> EXC(%exit(@I64_7) %exit(@I64_7))
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    %exit(<@i64> %v):
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        [%trapend] TRAP <> KEEPALIVE (%v)
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        COMMINST @uvm.thread_exit
}

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.funcdef @edge_asgn_test VERSION %v1 <@v_v> {
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    %entry():
        BRANCH %head(@I64_1 @I64_2 @I64_0)
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    %head(<@i64> %x <@i64> %y <@i64> %i):
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        %i2 = ADD <@i64> %i @I64_1
        %lt = SLT <@i64> %i @I64_1
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        BRANCH2 %lt %head(%y %x %i2) %end(%x %y)
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    %end(<@i64> %x <@i64> %y):
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        [%trap] TRAP <> KEEPALIVE (%x %y)
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        COMMINST @uvm.thread_exit
}

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.funcdef @square_sum VERSION %v1 <@ii_i> {
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    %entry (<@i64> %a <@i64> %b):
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        %a2 = MUL <@i64> %a %a
        %b2 = MUL <@i64> %b %b
        %s  = ADD <@i64> %a2 %b2
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        RET %s
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}

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.funcdef @call_ret VERSION %v1 <@ii_i> {
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    %entry(<@i64> %a <@i64> %b):
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        %ss = CALL <@ii_i> @square_sum (%a %b)
        [%trap] TRAP <> KEEPALIVE (%ss)
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        COMMINST @uvm.thread_exit
}

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.funcdef @thrower VERSION %v1 <@i_i> {
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    %entry(<@i64> %p0):
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        %n0 = NE <@i64> %p0 @I64_0
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        BRANCH2 %n0 %nz(%p0) %z()
    %nz(<@i64> %p0):
        RET %p0
    %z():
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        THROW @NULLREF
}

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.funcdef @call_throw VERSION %v1 <@i_i> {
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    %entry(<@i64> %p0):
        %rv = CALL <@i_i> @thrower (%p0) EXC(%nor(%rv) %exc())
    %nor(<@i64> %rv):
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        [%trapnor] TRAP <> EXC(%exit() %exit()) KEEPALIVE (%rv)
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    %exc() [%the_exc]:
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        [%trapexc] TRAP <> EXC(%exit() %exit()) KEEPALIVE (%the_exc)
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    %exit():
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        COMMINST @uvm.thread_exit
}

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.funcsig @swap.sig = (@i64 @i64) -> (@i64 @i64)
.funcdef @swap VERSION %v1 <@swap.sig> {
    %entry( <@i64> %a
            <@i64> %b):
        RET (%b %a)
}

.funcdef @checkpoint VERSION %v1 <@v_v> {
    %entry():
        [%trap] TRAP <>
        RET ()
}

.funcdef @call_multi_return VERSION %v1 <@v_v> {
    %entry():
        (%a %b) = CALL <@swap.sig> @swap (@I64_7 @I64_8)
        () = CALL <@v_v> @checkpoint ()
        [%trap] TRAP <> KEEPALIVE(%a %b)
        COMMINST @uvm.thread_exit
}


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// Some simple struct constants

.typedef @StructFoo = struct <@i32 @i64 @float @double>

.const @STRUCT_FOO <@StructFoo> = {@I32_1 @I64_2 @F_3 @D_4}

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.funcdef @aggregate_struct VERSION %v1 <@v_v> {
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    %entry():
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        %f1  = EXTRACTVALUE <@StructFoo 1> @STRUCT_FOO
        %s2  = INSERTVALUE  <@StructFoo 1> @STRUCT_FOO @I64_7
        %f12 = EXTRACTVALUE <@StructFoo 1> %s2

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        [%trapnor] TRAP <> KEEPALIVE (%f1 %f12)
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        COMMINST @uvm.thread_exit
}

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.const @v1 <@4xfloat> = {@F_0 @F_1 @F_2 @F_3}
.const @v2 <@4xfloat> = {@F_4 @F_5 @F_6 @F_7}
.const @vshf <@4xi32> = {@I32_0 @I32_2 @I32_4 @I32_6}

.typedef @6xi32_ary = array<@i32 6>
.const @a1 <@6xi32_ary> = {@I32_0 @I32_2 @I32_4 @I32_6 @I32_7 @I32_3}
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.funcdef @aggregate_seq VERSION %v1 <@v_v> {
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    %entry():
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        %ee0 = EXTRACTELEMENT <@4xfloat @i32> @4xF_V1 @I32_0
        %ie0 = INSERTELEMENT  <@4xfloat @i32> @4xF_V1 @I32_1 @F_6
        %sv0 = SHUFFLEVECTOR  <@4xfloat @4xi32> @4xF_V1 @4xF_V2 @vshf

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        %ee1 = EXTRACTELEMENT <@6xi32_ary @i64> @a1 @I64_4
        %ie1 = INSERTELEMENT  <@6xi32_ary @i64> @a1 @I64_5 @I32_1

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        [%trapnor] TRAP <> KEEPALIVE (%ee0 %ie0 %sv0 %ee1 %ie1)
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        COMMINST @uvm.thread_exit
}

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.typedef @StructBar = struct <
    @i64 @i32 @i16 @i8 @float @double
    @refi64 @irefi64 @weakrefi64
>

.typedef @refBar = ref<@StructBar>
.typedef @irefBar = iref<@StructBar>
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.typedef @ptrBar = uptr<@StructBar>
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.typedef @hCharArray = hybrid<@i64 @i8>

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.funcsig @allocs_sig = (@i64) -> ()
.funcdef @allocs VERSION %v1 <@allocs_sig> {
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    %entry(<@i64> %sz):
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        %new = NEW <@StructBar>
        %newhybrid = NEWHYBRID <@hCharArray @i64> %sz
        %alloca = ALLOCA <@StructBar>
        %allocahybrid = ALLOCAHYBRID <@hCharArray @i64> %sz

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        [%trap] TRAP <> KEEPALIVE (%new %newhybrid %alloca %allocahybrid)
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        COMMINST @uvm.thread_exit
}

.typedef @ArrayBaz = array <@i16 1024>
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.typedef @ptrBaz = uptr<@ArrayBaz>
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.typedef @JavaLikeByteArray = hybrid <@i32 @i8>
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.typedef @ptrJA = uptr<@JavaLikeByteArray>
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.const @I64_1024 <@i64> = 1024

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.funcdef @memAddressing VERSION %v1 <@v_v> {
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    %entry():
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        %bar_ref  = NEW <@StructBar>
        %bar_iref = GETIREF <@StructBar> %bar_ref
        %bar_3    = GETFIELDIREF <@StructBar 3> %bar_iref
        
        %baz_iref = ALLOCA <@ArrayBaz>
        %baz_3    = GETELEMIREF <@ArrayBaz @i64> %baz_iref @I64_3
        %baz_6    = SHIFTIREF <@i16 @i64> %baz_3 @I64_3
        
        %ja_ref   = NEWHYBRID <@JavaLikeByteArray @i64> @I64_1024
        %ja_iref  = GETIREF <@JavaLikeByteArray> %ja_ref
        %ja_var   = GETVARPARTIREF <@JavaLikeByteArray> %ja_iref

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        [%trap] TRAP <> KEEPALIVE (%bar_ref %bar_iref %bar_3
                    %baz_iref %baz_3 %baz_6 %ja_ref %ja_iref %ja_var)
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        COMMINST @uvm.thread_exit
}

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.funcdef @memAddressingPtr VERSION %v1 <@v_v> {
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    %entry():
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        %bar_ptr  = PTRCAST <@i64 @ptrBar> @I64_1024
        %baz_ptr  = PTRCAST <@i64 @ptrBaz> @I64_1024
        %ja_ptr   = PTRCAST <@i64 @ptrJA> @I64_1024

        %bar_3    = GETFIELDIREF PTR <@StructBar 3> %bar_ptr
        
        %baz_3    = GETELEMIREF PTR <@ArrayBaz @i64> %baz_ptr @I64_3
        %baz_6    = SHIFTIREF PTR <@i16 @i64> %baz_3 @I64_3
        
        %ja_var   = GETVARPARTIREF PTR <@JavaLikeByteArray> %ja_ptr

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        [%trap] TRAP <> KEEPALIVE (%bar_ptr %baz_ptr %ja_ptr
                    %bar_3 %baz_3 %baz_6 %ja_var)
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        COMMINST @uvm.thread_exit
}

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.global @g_i8   <@i8>
.global @g_i16  <@i16>
.global @g_i32  <@i32>
.global @g_i64  <@i64>
.global @g_f    <@float>
.global @g_d    <@double>
.global @g_r    <@refvoid>
.global @g_ir   <@irefvoid>
.global @g_wr   <@weakrefvoid>
    
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.global @g_func <@frv_v>
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.global @g_thr  <@thread>
.global @g_sta  <@stack>
.global @g_tr64 <@tagref64>

.const @I8_41  <@i8>     = 41
.const @I16_42 <@i16>    = 42
.const @I32_43 <@i32>    = 43
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.const @I32_53 <@i32>    = 53
.const @I32_63 <@i32>    = 63
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.const @I64_44 <@i64>    = 44
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.const @I64_54 <@i64>    = 54
.const @I64_64 <@i64>    = 64
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.const @F_45   <@float>  = 45.0f
.const @D_46   <@double> = 46.0d

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.funcdef @memAccessing VERSION %v1 <@v_v> {
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    %entry():
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        STORE <@i8>     @g_i8   @I8_41
        STORE <@i16>    @g_i16  @I16_42
        STORE <@i32>    @g_i32  @I32_43
        STORE <@i64>    @g_i64  @I64_44
        STORE <@float>  @g_f    @F_45
        STORE <@double> @g_d    @D_46
        
        %void_r  = NEW <@void>
        %void_ir = ALLOCA <@void>
        
        STORE <@refvoid>     @g_r  %void_r
        STORE <@irefvoid>    @g_ir %void_ir
        STORE <@weakrefvoid> @g_wr %void_r

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        STORE <@frv_v> @g_func @memAccessing
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        %li8  = LOAD <@i8>      @g_i8
        %li16 = LOAD <@i16>     @g_i16
        %li32 = LOAD <@i32>     @g_i32
        %li64 = LOAD <@i64>     @g_i64
        %lf   = LOAD <@float>   @g_f
        %ld   = LOAD <@double>  @g_d
        
        %lr   = LOAD <@refvoid>     @g_r
        %lir  = LOAD <@irefvoid>    @g_ir
        %lwr  = LOAD <@weakrefvoid> @g_wr

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        %lfunc = LOAD <@frv_v> @g_func
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        [%trap] TRAP <> KEEPALIVE (%void_r %void_ir %li8 %li16
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                    %li32 %li64 %lf %ld %lr %lir %lwr %lfunc)
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        COMMINST @uvm.thread_exit
}

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.const @I64_0x55ab              <@i64> = 0x55ab
.const @I64_0x5a5a              <@i64> = 0x5a5a
.const @I64_0x5000              <@i64> = 0x5000
.const @I64_0x55aa              <@i64> = 0x55aa
.const @I64_N0x7fffffffffffffde <@i64> = -0x7fffffffffffffde
.const @I64_42                  <@i64> = 42
.const @I64_11                  <@i64> = 11
.const @I64_0xffffffffffffffde  <@i64> = 0xffffffffffffffde

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.funcsig @memAccessingPtr_sig = (@ptri8 @ptri16 @ptri32 @ptri64
                @ptrfloat @ptrdouble @ptrptrvoid @ptrfpi_i) -> ()
.funcdef @memAccessingPtr VERSION %v1 <@memAccessingPtr_sig> {
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    %entry(<@ptri8> %p0 <@ptri16> %p1 <@ptri32> %p2 <@ptri64> %p3
           <@ptrfloat> %p4 <@ptrdouble> %p5 <@ptrptrvoid> %p6 <@ptrfpi_i> %p7):
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        STORE PTR <@i8>     %p0  @I8_41
        STORE PTR <@i16>    %p1  @I16_42
        STORE PTR <@i32>    %p2  @I32_43
        STORE PTR <@i64>    %p3  @I64_44
        STORE PTR <@float>  %p4  @F_45
        STORE PTR <@double> %p5  @D_46
        
        %my_p   = PTRCAST <@i64 @ptrptrvoid> @I64_0x55aa
        %my_fp  = PTRCAST <@i64 @ptrfpi_i>   @I64_0x55aa
        
        STORE PTR <@ptrvoid>    %p6  %my_p
        STORE PTR <@fpi_i>      %p7  %my_fp
        
        %li8  = LOAD PTR <@i8>      %p0
        %li16 = LOAD PTR <@i16>     %p1
        %li32 = LOAD PTR <@i32>     %p2
        %li64 = LOAD PTR <@i64>     %p3
        %lf   = LOAD PTR <@float>   %p4
        %ld   = LOAD PTR <@double>  %p5
        
        %lp   = LOAD PTR <@ptrvoid> %p6
        %lfp  = LOAD PTR <@fpi_i>   %p7

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        [%trap] TRAP <> KEEPALIVE (%li8 %li16
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                    %li32 %li64 %lf %ld %lp %lfp)
        COMMINST @uvm.thread_exit
}

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.funcdef @memAccessingAtomic VERSION %v1 <@v_v> {
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    %entry():
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        STORE SEQ_CST <@i32> @g_i32 @I32_43
        STORE SEQ_CST <@i64> @g_i64 @I64_44

        %void_r   = NEW <@void>
        %void_r2  = NEW <@void>
        %void_r3  = NEW <@void>
        
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        STORE SEQ_CST <@refvoid>     @g_r  %void_r
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        (%cx32_1 %succ32_1) = CMPXCHG SEQ_CST RELAXED <@i32> @g_i32 @I32_43 @I32_53
        (%cx32_2 %succ32_2) = CMPXCHG SEQ_CST RELAXED <@i32> @g_i32 @I32_43 @I32_63
        (%cx64_1 %succ64_1) = CMPXCHG SEQ_CST RELAXED <@i64> @g_i64 @I64_44 @I64_54
        (%cx64_2 %succ64_2) = CMPXCHG SEQ_CST RELAXED <@i64> @g_i64 @I64_44 @I64_64
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        %l32 = LOAD SEQ_CST <@i32> @g_i32
        %l64 = LOAD SEQ_CST <@i64> @g_i64
        
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        (%cxr_1 %succr_1) = CMPXCHG SEQ_CST RELAXED <@refvoid> @g_r %void_r %void_r2
        (%cxr_2 %succr_2) = CMPXCHG SEQ_CST RELAXED <@refvoid> @g_r %void_r %void_r3
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        %lr   = LOAD SEQ_CST <@refvoid>     @g_r
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        STORE <@i64> @g_i64 @I64_1
        
        %rmw0 = ATOMICRMW SEQ_CST XCHG  <@i64> @g_i64 @I64_0x55ab  // 1 -> 0x55ab
        %rmw1 = ATOMICRMW SEQ_CST ADD   <@i64> @g_i64 @I64_3       // 0x55ab -> 0x55ae 
        %rmw2 = ATOMICRMW SEQ_CST SUB   <@i64> @g_i64 @I64_4       // 0x55ae -> 0x55aa
        %rmw3 = ATOMICRMW SEQ_CST AND   <@i64> @g_i64 @I64_0x5a5a  // 0x55aa -> 0x500a
        %rmw4 = ATOMICRMW SEQ_CST NAND  <@i64> @g_i64 @I64_0x5a5a  // 0x500a -> ~0x500a
        %rmw5 = ATOMICRMW SEQ_CST OR    <@i64> @g_i64 @I64_0x5000  // ~0x500a -> ~0x000a
        %rmw6 = ATOMICRMW SEQ_CST XOR   <@i64> @g_i64 @I64_0x55aa  // ~0x000a -> ~0x55a0 
        %rmw7 = ATOMICRMW SEQ_CST MIN   <@i64> @g_i64 @I64_N0x7fffffffffffffde // ~0x55a0 -> -0x7fffffffffffffde
        %rmw8 = ATOMICRMW SEQ_CST MAX   <@i64> @g_i64 @I64_42      // -0x7fffffffffffffde -> 42
        %rmw9 = ATOMICRMW SEQ_CST UMIN  <@i64> @g_i64 @I64_11      // 42 -> 11
        %rmwA = ATOMICRMW SEQ_CST UMAX  <@i64> @g_i64 @I64_0xffffffffffffffde // 11 -> 0xffffffffffffffde
        
        %l64_2 = LOAD SEQ_CST <@i64> @g_i64

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        [%trap] TRAP <> KEEPALIVE (%void_r %void_r2 %void_r3
                    %cx32_1 %succ32_1 %cx32_2 %succ32_2 %cx64_1 %succ64_1 %cx64_2 %succ64_2
                    %l32 %l64
                    %cxr_1 %succr_1 %cxr_2 %succr_2
                    %lr
                    %rmw0 %rmw1 %rmw2 %rmw3 %rmw4 %rmw5 %rmw6 %rmw7 %rmw8 %rmw9 %rmwA
                    %l64_2)
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        COMMINST @uvm.thread_exit
}

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.funcsig @memAccessingAtomicPtr_sig = (@ptri8 @ptri16 @ptri32 @ptri64
                @ptrfloat @ptrdouble @ptrptrvoid @ptrfpi_i) -> ()
.funcdef @memAccessingAtomicPtr VERSION %v1 <@memAccessingAtomicPtr_sig> {
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    %entry(<@ptri8> %p0 <@ptri16> %p1 <@ptri32> %p2 <@ptri64> %p3
           <@ptrfloat> %p4 <@ptrdouble> %p5 <@ptrptrvoid> %p6 <@ptrfpi_i> %p7):
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        STORE PTR SEQ_CST <@i32> %p2 @I32_43
        STORE PTR SEQ_CST <@i64> %p3 @I64_44

        %ptr0  = PTRCAST <@i64 @ptrvoid> @I64_0x55ab
        %ptr1  = PTRCAST <@i64 @ptrvoid> @I64_0x5a5a
        %ptr2  = PTRCAST <@i64 @ptrvoid> @I64_0x5000
        %fp0   = PTRCAST <@i64 @fpi_i>   @I64_0x55ab
        %fp1   = PTRCAST <@i64 @fpi_i>   @I64_0x5a5a
        %fp2   = PTRCAST <@i64 @fpi_i>   @I64_0x5000
        
        STORE PTR SEQ_CST <@ptrvoid> %p6  %ptr0
        STORE PTR SEQ_CST <@fpi_i>   %p7  %fp0

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        (%cx32_1 %succ32_1) = CMPXCHG PTR SEQ_CST RELAXED <@i32> %p2 @I32_43 @I32_53
        (%cx32_2 %succ32_2) = CMPXCHG PTR SEQ_CST RELAXED <@i32> %p2 @I32_43 @I32_63
        (%cx64_1 %succ64_1) = CMPXCHG PTR SEQ_CST RELAXED <@i64> %p3 @I64_44 @I64_54
        (%cx64_2 %succ64_2) = CMPXCHG PTR SEQ_CST RELAXED <@i64> %p3 @I64_44 @I64_64
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        %l32 = LOAD PTR SEQ_CST <@i32> %p2
        %l64 = LOAD PTR SEQ_CST <@i64> %p3
        
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        (%cxp_1  %succp_1 ) = CMPXCHG PTR SEQ_CST RELAXED <@ptrvoid> %p6 %ptr0 %ptr1
        (%cxp_2  %succp_2 ) = CMPXCHG PTR SEQ_CST RELAXED <@ptrvoid> %p6 %ptr0 %ptr2
        (%cxfp_1 %succfp_1) = CMPXCHG PTR SEQ_CST RELAXED <@fpi_i>   %p7 %fp0 %fp1
        (%cxfp_2 %succfp_2) = CMPXCHG PTR SEQ_CST RELAXED <@fpi_i>   %p7 %fp0 %fp2
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        %lp   = LOAD PTR SEQ_CST <@ptrvoid> %p6
        %lfp  = LOAD PTR SEQ_CST <@fpi_i>   %p7
        
        STORE PTR <@i64> %p3 @I64_1
        
        %rmw0 = ATOMICRMW PTR SEQ_CST XCHG  <@i64> %p3 @I64_0x55ab  // 1 -> 0x55ab
        %rmw1 = ATOMICRMW PTR SEQ_CST ADD   <@i64> %p3 @I64_3       // 0x55ab -> 0x55ae 
        %rmw2 = ATOMICRMW PTR SEQ_CST SUB   <@i64> %p3 @I64_4       // 0x55ae -> 0x55aa
        %rmw3 = ATOMICRMW PTR SEQ_CST AND   <@i64> %p3 @I64_0x5a5a  // 0x55aa -> 0x500a
        %rmw4 = ATOMICRMW PTR SEQ_CST NAND  <@i64> %p3 @I64_0x5a5a  // 0x500a -> ~0x500a
        %rmw5 = ATOMICRMW PTR SEQ_CST OR    <@i64> %p3 @I64_0x5000  // ~0x500a -> ~0x000a
        %rmw6 = ATOMICRMW PTR SEQ_CST XOR   <@i64> %p3 @I64_0x55aa  // ~0x000a -> ~0x55a0 
        %rmw7 = ATOMICRMW PTR SEQ_CST MIN   <@i64> %p3 @I64_N0x7fffffffffffffde // ~0x55a0 -> -0x7fffffffffffffde
        %rmw8 = ATOMICRMW PTR SEQ_CST MAX   <@i64> %p3 @I64_42      // -0x7fffffffffffffde -> 42
        %rmw9 = ATOMICRMW PTR SEQ_CST UMIN  <@i64> %p3 @I64_11      // 42 -> 11
        %rmwA = ATOMICRMW PTR SEQ_CST UMAX  <@i64> %p3 @I64_0xffffffffffffffde // 11 -> 0xffffffffffffffde
        
        %l64_2 = LOAD PTR SEQ_CST <@i64> %p3

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        [%trap] TRAP <> KEEPALIVE (
                    %cx32_1 %succ32_1 %cx32_2 %succ32_2 %cx64_1 %succ64_1 %cx64_2 %succ64_2
                    %l32 %l64
                    %cxp_1 %succp_1 %cxp_2 %succp_2 %cxfp_1 %succfp_1 %cxfp_2 %succfp_2
                    %lp %lfp
                    %rmw0 %rmw1 %rmw2 %rmw3 %rmw4 %rmw5 %rmw6 %rmw7 %rmw8 %rmw9 %rmwA
                    %l64_2)
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        COMMINST @uvm.thread_exit
}

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.funcdef @memAccessingNull VERSION %v1 <@v_v> {
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    %entry():
        %l = LOAD <@i64> @NULLIREF_I64 EXC(%unreachable() %bb2())
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    %bb2():
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        STORE <@i64> @NULLIREF_I64 @I64_0 EXC(%unreachable() %bb3())
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    %bb3():
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        (%c %sc) = CMPXCHG SEQ_CST RELAXED <@i64> @NULLIREF_I64 @I64_0 @I64_1 EXC(%unreachable() %bb4())
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    %bb4():
        %a = ATOMICRMW SEQ_CST XCHG <@i64> @NULLIREF_I64 @I64_0 EXC(%unreachable() %exit())
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    %exit():
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        [%trap_exit] TRAP <>
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        COMMINST @uvm.thread_exit

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    %unreachable():
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        [%trap_unreachable] TRAP <>
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        COMMINST @uvm.thread_exit
}

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.funcdef @traptest VERSION %v1 <@v_v> {
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    %entry():
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        %v1 = [%t1] TRAP <@i64>
        (%v2 %v3) = [%t2] TRAP <@float @double> EXC(%bb2(%v1 %v2 %v3) %unreachable())
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    %bb2(<@i64> %v1 <@float> %v2 <@double> %v3):
        [%t3] TRAP <> EXC(%unreachable() %exit(%v1 %v2 %v3))
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    %exit(<@i64> %v1 <@float> %v2 <@double> %v3) [%exc]:
        [%trap_exit] TRAP <> KEEPALIVE (%v1 %v2 %v3 %exc)
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        COMMINST @uvm.thread_exit

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    %unreachable():
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        [%trap_unreachable] TRAP <>
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        COMMINST @uvm.thread_exit
}

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.funcdef @wptest VERSION %v1 <@v_v> {
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    %entry():
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        %v1 = [%w1] WATCHPOINT 1 <@i64> %dis() %bb2(%v1)
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    %bb2(<@i64> %v1):
        %v2 = [%w2] WATCHPOINT 1 <@double> %dis() %bb3(%v1 %v2) WPEXC(%unreachable())
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    %bb3(<@i64> %v1 <@double> %v2):
        [%w3] WATCHPOINT 1 <> %dis() %unreachable() WPEXC(%exit(%v1 %v2))
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    %exit(<@i64> %v1 <@double> %v2) [%exc]:
        [%trap_exit] TRAP <> KEEPALIVE (%v1 %v2 %exc)
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        COMMINST @uvm.thread_exit

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    %unreachable():
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        [%trap_unreachable] TRAP <>
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        COMMINST @uvm.thread_exit

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    %dis():
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        [%trap_dis] TRAP <>
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        COMMINST @uvm.thread_exit
}

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.funcdef @trapThrow VERSION %v1 <@v_v> {
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    %entry():
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        [%t] TRAP <>
        [%trap_unreachable] TRAP <>
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        COMMINST @uvm.thread_exit
}

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.funcdef @wpThrow VERSION %v1 <@v_v> {
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    %entry():
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        [%w] WATCHPOINT 2 <> %dis() %ena()
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    %dis():
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        [%trap_unreachable] TRAP <>
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        COMMINST @uvm.thread_exit

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    %ena():
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        [%trap_unreachable2] TRAP <>
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        COMMINST @uvm.thread_exit
}

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.funcdef @trapExc VERSION %v1 <@v_v> {
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    %entry():
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        CALL <@v_v> @trapThrow () EXC(%unreachable() %bb2())
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    %bb2() [%exc]:
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        CALL <@v_v> @wpThrow () EXC(%unreachable() %exit(%exc))
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    %exit(<@refvoid> %exc1) [%exc2]:
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        [%trap_exit] TRAP <> KEEPALIVE (%exc1 %exc2)
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        COMMINST @uvm.thread_exit

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    %unreachable():
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        [%trap_unreachable] TRAP <>
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        COMMINST @uvm.thread_exit
}

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.funcdef @wpbranch VERSION %v1 <@v_v> {
    %entry():
        WPBRANCH 42 %dis() %ena()
    %dis():
        [%trap] TRAP <>
        BRANCH %exit()
    %ena():
        [%trap] TRAP <>
        BRANCH %exit()
    %exit():
        COMMINST @uvm.thread_exit
}

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.funcsig @corostackfunc_sig = (@stack @i64) -> ()
.funcdef @corostackfunc VERSION %v1 <@corostackfunc_sig> {
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    %entry(<@stack> %fromsta <@i64> %p):
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        [%trap_coro1] TRAP <> KEEPALIVE(%fromsta %p)
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        %pp1 = ADD <@i64> %p @I64_1

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        %v1 = [%css1] SWAPSTACK %fromsta RET_WITH <@double> PASS_VALUES <@i64> (%pp1)
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        [%trap_coro2] TRAP <> KEEPALIVE(%v1)
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        [%css2] SWAPSTACK %fromsta RET_WITH <> PASS_VALUES <> () KEEPALIVE(%v1)
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        %excref = NEW <@i64>
        %exciref = GETIREF <@i64> %excref
        STORE <@i64> %exciref @I64_7    // Does not need to be atomic. It is single threaded.

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        [%css3] SWAPSTACK %fromsta KILL_OLD THROW_EXC %excref
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}

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.funcdef @testswapstack VERSION %v1 <@v_v> {
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    %entry():
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        %thisstack = COMMINST @uvm.current_stack ()
        
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        %coro = COMMINST @uvm.new_stack <[@corostackfunc_sig]> (@corostackfunc)
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        %v1 = [%mss1] SWAPSTACK %coro RET_WITH <@i64> PASS_VALUES <@stack @i64> (%thisstack @I64_2)
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        [%trap_main1] TRAP <> KEEPALIVE(%v1)
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        [%mss2] SWAPSTACK %coro RET_WITH <> PASS_VALUES <@double> (@D_3)
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        [%mss3] SWAPSTACK %coro RET_WITH <> PASS_VALUES <> () EXC(%unreachable() %exit())
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    %exit() [%exc]:
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        %excref = REFCAST <@refvoid @refi64> %exc
        %exciref = GETIREF <@i64> %excref
        %excval = LOAD <@i64> %exciref
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        [%trap_main2] TRAP <> KEEPALIVE(%excval)
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        COMMINST @uvm.thread_exit

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    %unreachable():
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        [%trap_unreachable] TRAP <>
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        COMMINST @uvm.thread_exit
}

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.const @I6_31 <@i6> = 31
.const @I52_SAMPLE <@i52> = 0xfedcba9876543
.const @D_42 <@double> = 42.0d

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.funcdef @testtr64 VERSION %v1 <@v_v> {
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    %entry():
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        %someobj = NEW <@i64>
        %rv = REFCAST <@refi64 @refvoid> %someobj

        %f = COMMINST @uvm.tr64.from_fp  (@D_42)
        %i = COMMINST @uvm.tr64.from_int (@I52_SAMPLE)
        %r = COMMINST @uvm.tr64.from_ref (%rv @I6_31)
        
        %f_is_f = COMMINST @uvm.tr64.is_fp  (%f)
        %f_is_i = COMMINST @uvm.tr64.is_int (%f)
        %f_is_r = COMMINST @uvm.tr64.is_ref (%f)
        %i_is_f = COMMINST @uvm.tr64.is_fp  (%i)
        %i_is_i = COMMINST @uvm.tr64.is_int (%i)
        %i_is_r = COMMINST @uvm.tr64.is_ref (%i)
        %r_is_f = COMMINST @uvm.tr64.is_fp  (%r)
        %r_is_i = COMMINST @uvm.tr64.is_int (%r)
        %r_is_r = COMMINST @uvm.tr64.is_ref (%r)
        
        %fb = COMMINST @uvm.tr64.to_fp  (%f)
        %ib = COMMINST @uvm.tr64.to_int (%i)
        %rb = COMMINST @uvm.tr64.to_ref (%r)
        %rt = COMMINST @uvm.tr64.to_tag (%r)
        
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        [%trap] TRAP <> KEEPALIVE (%rv %f %i %r %f_is_f %f_is_i %f_is_r
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                %i_is_f %i_is_i %i_is_r %r_is_f %r_is_i %r_is_r %fb %ib %rb %rt)
        COMMINST @uvm.thread_exit
}
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.funcdef @testdependency VERSION %v1 <@v_v> {
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    %entry():
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        %a = ADD <@i64> @I64_1 @I64_2
        %b = COMMINST @uvm.kill_dependency <@i64> (%a)
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        [%trap] TRAP <> KEEPALIVE (%b)
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        COMMINST @uvm.thread_exit
}
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.funcdef @objectpinning VERSION %v1 <@v_v> {
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    %entry():
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        %a = NEW <@i64>
        %b = GETIREF <@i64> %a

        %c = COMMINST @uvm.native.pin <@refi64> (%a)
        %d = COMMINST @uvm.native.pin <@irefi64> (%b)

        STORE PTR <@i64> %c @I64_42
        
        %e = LOAD PTR <@i64> %d
        %f = LOAD <@i64> %b

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        [%trap] TRAP <> KEEPALIVE (%a %b %c %d %e %f)
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        COMMINST @uvm.native.unpin <@refi64>  (%a)
        COMMINST @uvm.native.unpin <@irefi64> (%b)

        COMMINST @uvm.thread_exit
}