Commit 0787369e authored by Kunshan Wang's avatar Kunshan Wang

Fixed interpreter and impl details.

parent 559c72dc
......@@ -22,7 +22,7 @@ class MicroVM(heapSize: Word = MicroVM.DEFAULT_HEAP_SIZE,
// implicitly injected resources
private implicit val microVM = this
val globalBundle = new Bundle()
val globalBundle = new GlobalBundle()
val constantPool = new ConstantPool()
val memoryManager = new MemoryManager(heapSize, globalSize, stackSize)
......@@ -50,7 +50,7 @@ class MicroVM(heapSize: Word = MicroVM.DEFAULT_HEAP_SIZE,
/**
* Add things from a bundle to the Micro VM.
*/
def addBundle(bundle: Bundle) {
def addBundle(bundle: TrantientBundle) {
globalBundle.merge(bundle);
for (gc <- bundle.globalCellNs.all) {
......
......@@ -65,7 +65,8 @@ object TypeInferer {
case c: Constant => c.constTy
case g: GlobalCell => irefOf(g.cellTy)
case f: Function => funcOf(f.sig)
case p: Parameter => p.funcVer.sig.paramTy(p.index)
case p: NorParam => p.ty
case p: ExcParam => REF_VOID
case i: InstBinOp => i.opndTy
case i: InstCmp => i.opndTy match {
case TypeVector(_, l) => vecOf(I1, l)
......@@ -76,17 +77,14 @@ object TypeInferer {
case i: InstBranch => VOID
case i: InstBranch2 => VOID
case i: InstSwitch => VOID
case i: InstPhi => i.opndTy
case i: InstCall => i.sig.retTy
case i: InstTailCall => VOID
case i: InstRet => VOID
case i: InstRetVoid => VOID
case i: InstThrow => VOID
case i: InstLandingPad => REF_VOID
case i: InstExtractValue => i.strTy.fieldTys(i.index)
case i: InstInsertValue => i.strTy
case i: InstExtractElement => i.vecTy.elemTy
case i: InstInsertElement => i.vecTy
case i: InstExtractElement => i.seqTy.elemTy
case i: InstInsertElement => i.seqTy
case i: InstShuffleVector => vecOf((i.vecTy.elemTy, i.maskTy.len))
case i: InstNew => refOf(i.allocTy)
case i: InstNewHybrid => refOf(i.allocTy)
......
......@@ -292,7 +292,7 @@ object MemoryOperations {
lb.objRef + lb.offset
}
}
def noAccessViaPointer(ptr: Boolean, ty: Type) {
if (ptr) {
throw new UvmIllegalMemoryAccessException("Cannot access type %s via pointer".format(ty.repr))
......@@ -325,17 +325,17 @@ object MemoryOperations {
val base = memorySupport.loadLong(loc)
val offset = memorySupport.loadLong(loc + WORD_SIZE_BYTES)
br.asInstanceOf[BoxIRef].oo = (base, offset)
case _: TypeFunc =>
case _: TypeFuncRef =>
noAccessViaPointer(ptr, ty)
val fid = memorySupport.loadLong(loc).toInt
val func = microVM.globalBundle.funcNs.get(fid)
br.asInstanceOf[BoxFunc].func = func
case _: TypeThread =>
case _: TypeThreadRef =>
noAccessViaPointer(ptr, ty)
val tid = memorySupport.loadLong(loc).toInt
val thr = microVM.threadStackManager.getThreadByID(tid)
br.asInstanceOf[BoxThread].thread = thr
case _: TypeStack =>
case _: TypeStackRef =>
noAccessViaPointer(ptr, ty)
val sid = memorySupport.loadLong(loc).toInt
val sta = microVM.threadStackManager.getStackByID(sid)
......@@ -344,7 +344,7 @@ object MemoryOperations {
noAccessViaPointer(ptr, ty)
val raw = memorySupport.loadLong(loc)
br.asInstanceOf[BoxTagRef64].raw = raw
case _: TypePtr | _: TypeFuncPtr =>
case _: TypeUPtr | _: TypeUFuncPtr =>
val addr = memorySupport.loadLong(loc, !ptr)
br.asInstanceOf[BoxPointer].addr = addr
case _ => throw new UnimplementedOprationException("Loading of type %s is not supporing".format(ty.getClass.getName))
......@@ -387,15 +387,15 @@ object MemoryOperations {
val BoxIRef(base, offset) = nvb.asInstanceOf[BoxIRef]
memorySupport.storeLong(loc, base)
memorySupport.storeLong(loc + WORD_SIZE_BYTES, offset)
case _: TypeFunc =>
case _: TypeFuncRef =>
noAccessViaPointer(ptr, ty)
val fid = nvb.asInstanceOf[BoxFunc].func.map(_.id).getOrElse(0)
memorySupport.storeLong(loc, fid.toLong & 0xFFFFFFFFL)
case _: TypeThread =>
case _: TypeThreadRef =>
noAccessViaPointer(ptr, ty)
val tid = nvb.asInstanceOf[BoxThread].thread.map(_.id).getOrElse(0)
memorySupport.storeLong(loc, tid.toLong & 0xFFFFFFFFL)
case _: TypeStack =>
case _: TypeStackRef =>
noAccessViaPointer(ptr, ty)
val sid = nvb.asInstanceOf[BoxStack].stack.map(_.id).getOrElse(0)
memorySupport.storeLong(loc, sid.toLong & 0xFFFFFFFFL)
......@@ -403,7 +403,7 @@ object MemoryOperations {
noAccessViaPointer(ptr, ty)
val raw = nvb.asInstanceOf[BoxTagRef64].raw
memorySupport.storeLong(loc, raw)
case _: TypePtr | _: TypeFuncPtr =>
case _: TypeUPtr | _: TypeUFuncPtr =>
val addr = nvb.asInstanceOf[BoxPointer].addr
memorySupport.storeLong(loc, addr, !ptr)
case _ => throw new UnimplementedOprationException("Storing of type %s is not supporing".format(ty.getClass.getName))
......@@ -456,7 +456,7 @@ object MemoryOperations {
val (succ, (rl, rh)) = memorySupport.cmpXchgI128(loc, (el, eh), (dl, dh))
br.asInstanceOf[BoxIRef].oo = (rl, rh)
succ
case _: TypeFunc =>
case _: TypeFuncRef =>
noAccessViaPointer(ptr, ty)
val el = eb.asInstanceOf[BoxFunc].func.map(_.id).getOrElse(0).toLong
val dl = db.asInstanceOf[BoxFunc].func.map(_.id).getOrElse(0).toLong
......@@ -464,7 +464,7 @@ object MemoryOperations {
val rf = microVM.globalBundle.funcNs.get(rl.toInt)
br.asInstanceOf[BoxFunc].func = rf
succ
case _: TypeThread =>
case _: TypeThreadRef =>
noAccessViaPointer(ptr, ty)
val el = eb.asInstanceOf[BoxThread].thread.map(_.id).getOrElse(0).toLong
val dl = db.asInstanceOf[BoxThread].thread.map(_.id).getOrElse(0).toLong
......@@ -472,7 +472,7 @@ object MemoryOperations {
val rt = microVM.threadStackManager.getThreadByID(rl.toInt)
br.asInstanceOf[BoxThread].thread = rt
succ
case _: TypeStack =>
case _: TypeStackRef =>
noAccessViaPointer(ptr, ty)
val el = eb.asInstanceOf[BoxStack].stack.map(_.id).getOrElse(0).toLong
val dl = db.asInstanceOf[BoxStack].stack.map(_.id).getOrElse(0).toLong
......@@ -480,7 +480,7 @@ object MemoryOperations {
val rs = microVM.threadStackManager.getStackByID(rl.toInt)
br.asInstanceOf[BoxStack].stack = rs
succ
case _: TypePtr | _: TypeFuncPtr =>
case _: TypeUPtr | _: TypeUFuncPtr =>
val el = eb.asInstanceOf[BoxPointer].addr
val dl = db.asInstanceOf[BoxPointer].addr
val (succ, rl) = memorySupport.cmpXchgLong(loc, el, dl, !ptr)
......@@ -515,19 +515,19 @@ object MemoryOperations {
val BoxIRef(ol, oh) = ob.asInstanceOf[BoxIRef]
val (rl, rh) = memorySupport.xchgI128(loc, (ol, oh))
br.asInstanceOf[BoxIRef].oo = (rl, rh)
case _: TypeFunc =>
case _: TypeFuncRef =>
noAccessViaPointer(ptr, ty)
val ol = ob.asInstanceOf[BoxFunc].func.map(_.id).getOrElse(0).toLong
val rl = memorySupport.atomicRMWLong(op, loc, ol)
val rf = microVM.globalBundle.funcNs.get(rl.toInt)
br.asInstanceOf[BoxFunc].func = rf
case _: TypeThread =>
case _: TypeThreadRef =>
noAccessViaPointer(ptr, ty)
val ol = ob.asInstanceOf[BoxThread].thread.map(_.id).getOrElse(0).toLong
val rl = memorySupport.atomicRMWLong(op, loc, ol)
val rt = microVM.threadStackManager.getThreadByID(rl.toInt)
br.asInstanceOf[BoxThread].thread = rt
case _: TypeStack =>
case _: TypeStackRef =>
noAccessViaPointer(ptr, ty)
val ol = ob.asInstanceOf[BoxStack].stack.map(_.id).getOrElse(0).toLong
val rl = memorySupport.atomicRMWLong(op, loc, ol)
......@@ -538,7 +538,7 @@ object MemoryOperations {
val ol = ob.asInstanceOf[BoxTagRef64].raw
val rl = memorySupport.atomicRMWLong(op, loc, ol)
br.asInstanceOf[BoxTagRef64].raw = rl
case _: TypePtr | _: TypeFuncPtr =>
case _: TypeUPtr | _: TypeUFuncPtr =>
val ol = ob.asInstanceOf[BoxPointer].addr
val rl = memorySupport.atomicRMWLong(op, loc, ol, !ptr)
br.asInstanceOf[BoxPointer].addr = rl
......
......@@ -58,7 +58,7 @@ class InterpreterStack(val id: Int, val stackMemory: StackMemory, stackBottomFun
top = newFrame
top.savedStackPointer = stackMemory.top
}
def pushMuFrameForCallBack(funcVer: FuncVer, cookie: Long, args: Seq[ValueBox]): Unit = {
val newFrame = InterpreterFrame.forMuFunc(funcVer, cookie, args, Some(top))
top = newFrame
......@@ -146,7 +146,7 @@ object InterpreterFrame {
def forMuFunc(funcVer: FuncVer, cookie: Long, args: Seq[ValueBox], prev: Option[InterpreterFrame]): MuFrame = {
val frm = new MuFrame(funcVer, cookie, prev) // Bottom frame
for ((p, a) <- (funcVer.params zip args)) {
for ((p, a) <- (funcVer.entry.norParams zip args)) {
frm.boxes(p).copyFrom(a)
}
......@@ -161,14 +161,14 @@ object InterpreterFrame {
/**
* A Mu frame
*
*
* @param cookie: The cookie in the native interface. When called by another Mu function, cookie can be any value.
*/
class MuFrame(val funcVer: FuncVer, val cookie: Long, prev: Option[InterpreterFrame]) extends InterpreterFrame(prev) {
val boxes = new HashMap[LocalVariable, ValueBox]()
/** Edge-assigned instructions take values determined at look backedges */
val edgeAssignedBoxes = new HashMap[EdgeAssigned, ValueBox]()
val edgeAssignedBoxes = new HashMap[Parameter, ValueBox]()
/** Current basic block */
var curBB: BasicBlock = funcVer.entry
......@@ -201,19 +201,25 @@ class MuFrame(val funcVer: FuncVer, val cookie: Long, prev: Option[InterpreterFr
makeBoxes()
private def makeBoxes() {
for (param <- funcVer.params) {
putBox(param)
}
for (bb <- funcVer.bbs; inst <- bb.insts) {
putBox(inst)
for (bb <- funcVer.bbs) {
for (p <- bb.norParams) {
putBox(p)
}
for (p <- bb.excParam) {
putBox(p)
}
for (inst <- bb.insts) {
putBox(inst)
}
}
}
private def putBox(lv: LocalVariable) {
val ty = TypeInferer.inferType(lv)
boxes.put(lv, ValueBox.makeBoxForType(ty))
if (lv.isInstanceOf[EdgeAssigned]) {
edgeAssignedBoxes.put(lv.asInstanceOf[EdgeAssigned], ValueBox.makeBoxForType(ty))
if (lv.isInstanceOf[Parameter]) {
edgeAssignedBoxes.put(lv.asInstanceOf[Parameter], ValueBox.makeBoxForType(ty))
}
}
......
......@@ -68,17 +68,17 @@ object TypeSizes {
case _: TypeRef => WORD_SIZE_BYTES
case _: TypeIRef => 2L * WORD_SIZE_BYTES
case _: TypeWeakRef => WORD_SIZE_BYTES
case t @ TypeStruct(ftys) => structPrefixSizeOf(t, ftys.size)
case t @ TypeStruct(ftys) => structPrefixSizeOf(t, ftys.size)
case t @ TypeArray(et, l) => seqPrefixSizeOf(t, l)
case _: TypeHybrid => throw new IllegalArgumentException("Hybrid should use hybridSizeOf to probe size")
case _: TypeVoid => 0L
case _: TypeFunc => WORD_SIZE_BYTES
case _: TypeThread => WORD_SIZE_BYTES
case _: TypeStack => WORD_SIZE_BYTES
case _: TypeFuncRef => WORD_SIZE_BYTES
case _: TypeThreadRef => WORD_SIZE_BYTES
case _: TypeStackRef => WORD_SIZE_BYTES
case _: TypeTagRef64 => 8L
case t @ TypeVector(et, l) => seqPrefixSizeOf(t, l)
case _: TypePtr => WORD_SIZE_BYTES
case _: TypeFuncPtr => WORD_SIZE_BYTES
case _: TypeUPtr => WORD_SIZE_BYTES
case _: TypeUFuncPtr => WORD_SIZE_BYTES
}
def alignOf(ty: Type): Word = ty match {
......@@ -105,9 +105,9 @@ object TypeSizes {
}
def fieldOffsetOf(ty: TypeStruct, index: Int): Word = {
val fieldType = ty.fieldTy(index)
val fieldType = ty.fieldTys(index)
val fieldAlign = alignOf(fieldType)
val prefixSize = structPrefixSizeOf(ty, index)
val prefixSize = structPrefixSizeOf(ty, index)
val offset = alignUp(prefixSize, fieldAlign)
return offset
}
......@@ -126,8 +126,8 @@ object TypeSizes {
return alignUp(sizeOf(ty.fixedTy), alignOf(ty.varTy))
}
def structPrefixSizeOf(ty: TypeStruct, prefixLen: Int): Word = {
val sz = ty.fieldTy.take(prefixLen).foldLeft(0L) { (oldSz, nextTy) =>
def structPrefixSizeOf(ty: TypeStruct, prefixLen: Int): Word = {
val sz = ty.fieldTys.take(prefixLen).foldLeft(0L) { (oldSz, nextTy) =>
alignUp(oldSz, alignOf(nextTy)) + sizeOf(nextTy)
}
return sz
......
......@@ -62,7 +62,7 @@ object MemoryDataScanner extends StrictLogging {
}
case t: TypeStruct => {
var fieldAddr = iRef
for (fieldTy <- t.fieldTy) {
for (fieldTy <- t.fieldTys) {
val fieldAlign = TypeSizes.alignOf(fieldTy)
fieldAddr = TypeSizes.alignUp(fieldAddr, fieldAlign)
scanField(fieldTy, objRef, fieldAddr, handler)
......@@ -96,7 +96,7 @@ object MemoryDataScanner extends StrictLogging {
curAddr = TypeSizes.alignUp(curAddr + varSize, varAlign)
}
}
case t: TypeStack => {
case t: TypeStackRef => {
val toStackID = memorySupport.loadLong(iRef)
val maybeToStack = if (toStackID == 0) {
None
......
......@@ -185,8 +185,6 @@ case class InstTailCall(var sig: FuncSig, var callee: SSAVariable, var argList:
case class InstRet(val funcVer: FuncVer, var retVal: SSAVariable) extends AbstractRet
case class InstRetVoid() extends AbstractRet
case class InstThrow(var excVal: SSAVariable) extends Instruction
case class InstExtractValue(var strTy: TypeStruct, var index: Int, var opnd: SSAVariable) extends Instruction
......
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