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Commit 0787369e authored by Kunshan Wang's avatar Kunshan Wang
Browse files

Fixed interpreter and impl details.

parent 559c72dc
...@@ -22,7 +22,7 @@ class MicroVM(heapSize: Word = MicroVM.DEFAULT_HEAP_SIZE, ...@@ -22,7 +22,7 @@ class MicroVM(heapSize: Word = MicroVM.DEFAULT_HEAP_SIZE,
// implicitly injected resources // implicitly injected resources
private implicit val microVM = this private implicit val microVM = this
val globalBundle = new Bundle() val globalBundle = new GlobalBundle()
val constantPool = new ConstantPool() val constantPool = new ConstantPool()
val memoryManager = new MemoryManager(heapSize, globalSize, stackSize) val memoryManager = new MemoryManager(heapSize, globalSize, stackSize)
...@@ -50,7 +50,7 @@ class MicroVM(heapSize: Word = MicroVM.DEFAULT_HEAP_SIZE, ...@@ -50,7 +50,7 @@ class MicroVM(heapSize: Word = MicroVM.DEFAULT_HEAP_SIZE,
/** /**
* Add things from a bundle to the Micro VM. * Add things from a bundle to the Micro VM.
*/ */
def addBundle(bundle: Bundle) { def addBundle(bundle: TrantientBundle) {
globalBundle.merge(bundle); globalBundle.merge(bundle);
for (gc <- bundle.globalCellNs.all) { for (gc <- bundle.globalCellNs.all) {
......
...@@ -65,7 +65,8 @@ object TypeInferer { ...@@ -65,7 +65,8 @@ object TypeInferer {
case c: Constant => c.constTy case c: Constant => c.constTy
case g: GlobalCell => irefOf(g.cellTy) case g: GlobalCell => irefOf(g.cellTy)
case f: Function => funcOf(f.sig) case f: Function => funcOf(f.sig)
case p: Parameter => p.funcVer.sig.paramTy(p.index) case p: NorParam => p.ty
case p: ExcParam => REF_VOID
case i: InstBinOp => i.opndTy case i: InstBinOp => i.opndTy
case i: InstCmp => i.opndTy match { case i: InstCmp => i.opndTy match {
case TypeVector(_, l) => vecOf(I1, l) case TypeVector(_, l) => vecOf(I1, l)
...@@ -76,17 +77,14 @@ object TypeInferer { ...@@ -76,17 +77,14 @@ object TypeInferer {
case i: InstBranch => VOID case i: InstBranch => VOID
case i: InstBranch2 => VOID case i: InstBranch2 => VOID
case i: InstSwitch => VOID case i: InstSwitch => VOID
case i: InstPhi => i.opndTy
case i: InstCall => i.sig.retTy case i: InstCall => i.sig.retTy
case i: InstTailCall => VOID case i: InstTailCall => VOID
case i: InstRet => VOID case i: InstRet => VOID
case i: InstRetVoid => VOID
case i: InstThrow => VOID case i: InstThrow => VOID
case i: InstLandingPad => REF_VOID
case i: InstExtractValue => i.strTy.fieldTys(i.index) case i: InstExtractValue => i.strTy.fieldTys(i.index)
case i: InstInsertValue => i.strTy case i: InstInsertValue => i.strTy
case i: InstExtractElement => i.vecTy.elemTy case i: InstExtractElement => i.seqTy.elemTy
case i: InstInsertElement => i.vecTy case i: InstInsertElement => i.seqTy
case i: InstShuffleVector => vecOf((i.vecTy.elemTy, i.maskTy.len)) case i: InstShuffleVector => vecOf((i.vecTy.elemTy, i.maskTy.len))
case i: InstNew => refOf(i.allocTy) case i: InstNew => refOf(i.allocTy)
case i: InstNewHybrid => refOf(i.allocTy) case i: InstNewHybrid => refOf(i.allocTy)
......
...@@ -100,10 +100,10 @@ class InterpreterThread(val id: Int, initialStack: InterpreterStack, val mutator ...@@ -100,10 +100,10 @@ class InterpreterThread(val id: Int, initialStack: InterpreterStack, val mutator
private def boxOf(v: SSAVariable): ValueBox = boxOf(curStack, v) private def boxOf(v: SSAVariable): ValueBox = boxOf(curStack, v)
/** Get the edge-assigned value box of an edge-assigned instruction in a stack. */ /** Get the edge-assigned value box of an edge-assigned instruction in a stack. */
private def edgeAssignedBoxOf(s: InterpreterStack, ea: EdgeAssigned): ValueBox = topMu.edgeAssignedBoxes(ea) private def edgeAssignedBoxOf(s: InterpreterStack, p: Parameter): ValueBox = topMu.edgeAssignedBoxes(p)
/** Get the edge-assigned value box of an edge-assigned instruction in the current stack. */ /** Get the edge-assigned value box of an edge-assigned instruction in the current stack. */
private def edgeAssignedBoxOf(ea: EdgeAssigned): ValueBox = edgeAssignedBoxOf(curStack, ea) private def edgeAssignedBoxOf(p: Parameter): ValueBox = edgeAssignedBoxOf(curStack, p)
// Context printing for debugging // Context printing for debugging
...@@ -191,7 +191,7 @@ class InterpreterThread(val id: Int, initialStack: InterpreterStack, val mutator ...@@ -191,7 +191,7 @@ class InterpreterThread(val id: Int, initialStack: InterpreterStack, val mutator
case e: UvmDivisionByZeroException => excClause match { case e: UvmDivisionByZeroException => excClause match {
case None => throw e case None => throw e
case Some(ec) => { case Some(ec) => {
branchAndMovePC(ec.exc) branchAndAssignParameters(ec.exc)
} }
} }
} }
...@@ -465,13 +465,13 @@ class InterpreterThread(val id: Int, initialStack: InterpreterStack, val mutator ...@@ -465,13 +465,13 @@ class InterpreterThread(val id: Int, initialStack: InterpreterStack, val mutator
} }
case i @ InstBranch(dest) => { case i @ InstBranch(dest) => {
branchAndMovePC(dest) branchAndAssignParameters(dest)
} }
case i @ InstBranch2(cond, ifTrue, ifFalse) => { case i @ InstBranch2(cond, ifTrue, ifFalse) => {
val cv = boxOf(cond).asInstanceOf[BoxInt].value val cv = boxOf(cond).asInstanceOf[BoxInt].value
val dest = if (cv == 1) ifTrue else ifFalse val dest = if (cv == 1) ifTrue else ifFalse
branchAndMovePC(dest) branchAndAssignParameters(dest)
} }
case i @ InstSwitch(opndTy, opnd, defDest, cases) => { case i @ InstSwitch(opndTy, opnd, defDest, cases) => {
...@@ -479,15 +479,12 @@ class InterpreterThread(val id: Int, initialStack: InterpreterStack, val mutator ...@@ -479,15 +479,12 @@ class InterpreterThread(val id: Int, initialStack: InterpreterStack, val mutator
case TypeInt(l) => { case TypeInt(l) => {
val ov = boxOf(opnd).asInstanceOf[BoxInt].value val ov = boxOf(opnd).asInstanceOf[BoxInt].value
val dest = cases.find(pair => boxOf(pair._1).asInstanceOf[BoxInt].value == ov).map(_._2).getOrElse(defDest) val dest = cases.find(pair => boxOf(pair._1).asInstanceOf[BoxInt].value == ov).map(_._2).getOrElse(defDest)
branchAndMovePC(dest) branchAndAssignParameters(dest)
} }
case _ => throw new UvmRefImplException(ctx + "Operand type must be integer. %s found.".format(opndTy)) case _ => throw new UvmRefImplException(ctx + "Operand type must be integer. %s found.".format(opndTy))
} }
} }
case i @ InstPhi(_, _) => throw new UvmRefImplException(ctx + "PHI instructions reached in normal execution, " +
"but PHI must only appear in the beginning of basic blocks and not in the entry block.")
case i @ InstCall(sig, callee, argList, excClause, keepAlives) => { case i @ InstCall(sig, callee, argList, excClause, keepAlives) => {
val calleeFunc = boxOf(callee).asInstanceOf[BoxFunc].func.getOrElse { val calleeFunc = boxOf(callee).asInstanceOf[BoxFunc].func.getOrElse {
throw new UvmRuntimeException(ctx + "Callee must not be NULL") throw new UvmRuntimeException(ctx + "Callee must not be NULL")
...@@ -534,32 +531,12 @@ class InterpreterThread(val id: Int, initialStack: InterpreterStack, val mutator ...@@ -534,32 +531,12 @@ class InterpreterThread(val id: Int, initialStack: InterpreterStack, val mutator
} }
} }
case i @ InstRetVoid() => {
curStack.popFrame()
top match {
case f: MuFrame => {
finishHalfExecutedInst()
}
case f: NativeFrame => {
// Now the top is a native frame, and it must be calling back to Mu.
// Since Mu returns void, we don't need to assign the return value.
// Return to native, and keep an eye on the result, in case it calls back again.
val result = curStack.returnToNativeOnStack()
// Handle the control flow according to how the native function respond
handleNativeCallResult(result)
}
}
}
case i @ InstThrow(excVal) => { case i @ InstThrow(excVal) => {
val exc = boxOf(excVal).asInstanceOf[BoxRef].objRef val exc = boxOf(excVal).asInstanceOf[BoxRef].objRef
curStack.popFrame() curStack.popFrame()
catchException(exc) catchException(exc)
} }
case i @ InstLandingPad() => throw new UvmRefImplException(ctx + "LANDINGPAD instructions reached in normal execution, " +
"but LANDINGPAD must only appear in the beginning of basic blocks and not in the entry block.")
case i @ InstExtractValue(strTy, index, opnd) => { case i @ InstExtractValue(strTy, index, opnd) => {
val ob = boxOf(opnd).asInstanceOf[BoxStruct] val ob = boxOf(opnd).asInstanceOf[BoxStruct]
val fb = ob.values(index) val fb = ob.values(index)
...@@ -801,7 +778,7 @@ class InterpreterThread(val id: Int, initialStack: InterpreterStack, val mutator ...@@ -801,7 +778,7 @@ class InterpreterThread(val id: Int, initialStack: InterpreterStack, val mutator
if (isEnabled) { if (isEnabled) {
doTrap(retTy, wpID) doTrap(retTy, wpID)
} else { } else {
branchAndMovePC(dis) branchAndAssignParameters(dis)
} }
} }
...@@ -861,9 +838,6 @@ class InterpreterThread(val id: Int, initialStack: InterpreterStack, val mutator ...@@ -861,9 +838,6 @@ class InterpreterThread(val id: Int, initialStack: InterpreterStack, val mutator
val argBox = boxOf(oldStack, arg) val argBox = boxOf(oldStack, arg)
rebindPassValue(newStack, argBox) rebindPassValue(newStack, argBox)
} }
case PassVoid() => {
rebindPassVoid(newStack)
}
case ThrowExc(exc) => { case ThrowExc(exc) => {
val excBox = boxOf(oldStack, exc) val excBox = boxOf(oldStack, exc)
rebindThrowExc(newStack, excBox) rebindThrowExc(newStack, excBox)
...@@ -1188,49 +1162,51 @@ class InterpreterThread(val id: Int, initialStack: InterpreterStack, val mutator ...@@ -1188,49 +1162,51 @@ class InterpreterThread(val id: Int, initialStack: InterpreterStack, val mutator
// Control flow helpers // Control flow helpers
/** Branch to a basic block and execute starter instructions (PHI and LANDINGPAD). */ /** Branch to a basic block and execute starter instructions (PHI and LANDINGPAD). */
private def branchAndMovePC(dest: BasicBlock, excAddr: Word = 0L): Unit = { private def branchAndAssignParameters(destClause: DestClause, maybeExcAddr: Option[Word] = None): Unit = {
val curBB = this.curBB val curBB = this.curBB
var cont = true val dest = destClause.bb
var i = 0 val norArgs = destClause.args
// Determine the value of edge-assigned instructions (phis and landingpads), but keep them in their temporary boxes. // Copy to edge-assigned boxes, first.
while (cont) { assert(norArgs.length == dest.norParams.length)
dest.insts(i) match { for ((arg, np) <- norArgs zip dest.norParams) {
case phi @ InstPhi(opndTy, cases) => { val argBox = boxOf(arg)
val caseVal = cases.find(_._1 == curBB).map(_._2).getOrElse { val npEdgeBox = edgeAssignedBoxOf(np)
throw new UvmRuntimeException(s"Phi node ${phi.repr} does not include the case for source basic block ${curBB.repr}") npEdgeBox.copyFrom(argBox)
} }
val vb = boxOf(caseVal)
val db = edgeAssignedBoxOf(phi) for (ep <- dest.excParam) {
db.copyFrom(vb) maybeExcAddr match {
i += 1 case None => throw new UvmRefImplException(ctx + "Branching normally to a basic block with ExcParam: %s".format(dest.repr))
} case Some(excAddr) => {
case lp: InstLandingPad => { val epEdgeBox = edgeAssignedBoxOf(ep).asInstanceOf[BoxRef]
val db = edgeAssignedBoxOf(lp).asInstanceOf[BoxRef] epEdgeBox.setObjRef(excAddr)
db.objRef = excAddr
i += 1
} }
case _ => cont = false
} }
} }
// Copy the values of edge-assigned instructions (phis and landingpads) to their canonical boxes. // Copy from edge-assigned boxes to their canonical boxes.
for (j <- 0 until i) { for (np <- dest.norParams) {
val destInst = dest.insts(j) val npEdgeBox = edgeAssignedBoxOf(np)
val sb = edgeAssignedBoxOf(destInst.asInstanceOf[EdgeAssigned]) val npBox = boxOf(np)
val db = boxOf(destInst) npBox.copyFrom(npEdgeBox)
db.copyFrom(sb) }
for (ep <- dest.excParam) {
val epEdgeBox = edgeAssignedBoxOf(ep)
val epBox = boxOf(ep)
epBox.copyFrom(epEdgeBox)
} }
// Continue execution // Continue execution
jump(dest, i) jump(dest, 0)
} }
/** Continue normally. Work for all instructions. */ /** Continue normally. Work for all instructions. */
private def continueNormally(): Unit = { private def continueNormally(): Unit = {
curInst match { curInst match {
case wp: InstWatchPoint => { case wp: InstWatchPoint => {
branchAndMovePC(wp.ena) branchAndAssignParameters(wp.ena)
// NOTE: WatchPoint only "continue normally" when the current stack is rebound with value or void. // NOTE: WatchPoint only "continue normally" when the current stack is rebound with value or void.
// This includes executing a watch point. In any case, this watch point must have been enabled. If the watch // This includes executing a watch point. In any case, this watch point must have been enabled. If the watch
// point is disabled during the course the stack is unbound, this watch point should still continue from the // point is disabled during the course the stack is unbound, this watch point should still continue from the
...@@ -1239,7 +1215,7 @@ class InterpreterThread(val id: Int, initialStack: InterpreterStack, val mutator ...@@ -1239,7 +1215,7 @@ class InterpreterThread(val id: Int, initialStack: InterpreterStack, val mutator
case h: HasExcClause => h.excClause match { case h: HasExcClause => h.excClause match {
case None => incPC() case None => incPC()
case Some(ec) => { case Some(ec) => {
branchAndMovePC(ec.nor) branchAndAssignParameters(ec.nor)
} }
} }
case _ => incPC() case _ => incPC()
...@@ -1264,9 +1240,9 @@ class InterpreterThread(val id: Int, initialStack: InterpreterStack, val mutator ...@@ -1264,9 +1240,9 @@ class InterpreterThread(val id: Int, initialStack: InterpreterStack, val mutator
*/ */
private def catchException(exc: Word): Unit = { private def catchException(exc: Word): Unit = {
@tailrec @tailrec
def unwindUntilCatchable(frame: InterpreterFrame): (InterpreterFrame, BasicBlock) = frame match { def unwindUntilCatchable(frame: InterpreterFrame): (InterpreterFrame, DestClause) = frame match {
case f: MuFrame => maybeFindExceptionHandler(f.curInst) match { case f: MuFrame => maybeFindExceptionHandler(f.curInst) match {
case Some(bb) => (f, bb) case Some(dc) => (f, dc)
case None => f.prev match { case None => f.prev match {
case None => throw new UvmRuntimeException(ctx + "Exception is thrown out of the bottom frame.") case None => throw new UvmRuntimeException(ctx + "Exception is thrown out of the bottom frame.")
case Some(prev) => unwindUntilCatchable(prev) case Some(prev) => unwindUntilCatchable(prev)
...@@ -1280,30 +1256,30 @@ class InterpreterThread(val id: Int, initialStack: InterpreterStack, val mutator ...@@ -1280,30 +1256,30 @@ class InterpreterThread(val id: Int, initialStack: InterpreterStack, val mutator
val s = curStack val s = curStack
val f = s.top val f = s.top
val (newFrame, newBB) = unwindUntilCatchable(f) val (newFrame, dc) = unwindUntilCatchable(f)
s.unwindTo(newFrame) s.unwindTo(newFrame)
branchAndMovePC(newBB, exc) branchAndAssignParameters(dc, Some(exc))
curInstHalfExecuted = false curInstHalfExecuted = false
} }
/** /**
* Test if the current frame with i as the current instruction can catch an exception that unwinds the stack. * Test if the current frame with i as the current instruction can catch an exception that unwinds the stack.
* *
* @return Return Some(h) if i can catch the exception and h is the basic block for the exception. Return None if i * @return Return Some(dc) if i can catch the exception and d is the destination clause for the exception. Return None if i
* cannot catch exceptions. * cannot catch exceptions.
* *
* @throw Throw UvmRefimplException if a frame stops at an unexpected instruction. Normally the top frame can be * @throw Throw UvmRefimplException if a frame stops at an unexpected instruction. Normally the top frame can be
* executing TRAP, WATCHPOINT, SWAPSTACK or CALL and all other frames must be executing CALL. * executing TRAP, WATCHPOINT, SWAPSTACK or CALL and all other frames must be executing CALL.
*/ */
private def maybeFindExceptionHandler(inst: Instruction): Option[BasicBlock] = { private def maybeFindExceptionHandler(inst: Instruction): Option[DestClause] = {
inst match { inst match {
case i: InstCall => i.excClause.map(_.exc) case i: InstCall => i.excClause.map(_.exc)
case i: InstTrap => i.excClause.map(_.exc) case i: InstTrap => i.excClause.map(_.exc)
case i: InstWatchPoint => i.exc case i: InstWatchPoint => i.exc
case i: InstSwapStack => i.excClause.map(_.exc) case i: InstSwapStack => i.excClause.map(_.exc)
case _ => { case _ => {
throw new UvmRefImplException(ctx + "Instruction %s (%s) is in a stack frame when an exception is thrown.".format(inst.repr, inst.getClass.getName)) throw new UvmRefImplException(ctx + "Non-OSR point instruction %s (%s) is in a stack frame when an exception is thrown.".format(inst.repr, inst.getClass.getName))
} }
} }
} }
...@@ -1351,9 +1327,6 @@ class InterpreterThread(val id: Int, initialStack: InterpreterStack, val mutator ...@@ -1351,9 +1327,6 @@ class InterpreterThread(val id: Int, initialStack: InterpreterStack, val mutator
MemoryOperations.addressOf(ptr, boxOf(v)) MemoryOperations.addressOf(ptr, boxOf(v))
} }
def incrementBoxPointer(src: BoxPointer, dst: BoxPointer, addrIncr: Word): Unit = {
}
// Thread termination // Thread termination
/** Terminate the thread. Please only let the thread terminate itself. */ /** Terminate the thread. Please only let the thread terminate itself. */
...@@ -1486,7 +1459,7 @@ class InterpreterThread(val id: Int, initialStack: InterpreterStack, val mutator ...@@ -1486,7 +1459,7 @@ class InterpreterThread(val id: Int, initialStack: InterpreterStack, val mutator
private def branchToExcDestOr(excClause: Option[ExcClause])(f: => Unit): Unit = { private def branchToExcDestOr(excClause: Option[ExcClause])(f: => Unit): Unit = {
excClause match { excClause match {
case None => f case None => f
case Some(ExcClause(_, excBB)) => branchAndMovePC(excBB, 0L) case Some(ExcClause(_, excBB)) => branchAndAssignParameters(excBB)
} }
} }
......
...@@ -292,7 +292,7 @@ object MemoryOperations { ...@@ -292,7 +292,7 @@ object MemoryOperations {
lb.objRef + lb.offset lb.objRef + lb.offset
} }
} }
def noAccessViaPointer(ptr: Boolean, ty: Type) { def noAccessViaPointer(ptr: Boolean, ty: Type) {
if (ptr) { if (ptr) {
throw new UvmIllegalMemoryAccessException("Cannot access type %s via pointer".format(ty.repr)) throw new UvmIllegalMemoryAccessException("Cannot access type %s via pointer".format(ty.repr))
...@@ -325,17 +325,17 @@ object MemoryOperations { ...@@ -325,17 +325,17 @@ object MemoryOperations {
val base = memorySupport.loadLong(loc) val base = memorySupport.loadLong(loc)
val offset = memorySupport.loadLong(loc + WORD_SIZE_BYTES) val offset = memorySupport.loadLong(loc + WORD_SIZE_BYTES)
br.asInstanceOf[BoxIRef].oo = (base, offset) br.asInstanceOf[BoxIRef].oo = (base, offset)
case _: TypeFunc => case _: TypeFuncRef =>
noAccessViaPointer(ptr, ty) noAccessViaPointer(ptr, ty)
val fid = memorySupport.loadLong(loc).toInt val fid = memorySupport.loadLong(loc).toInt
val func = microVM.globalBundle.funcNs.get(fid) val func = microVM.globalBundle.funcNs.get(fid)
br.asInstanceOf[BoxFunc].func = func br.asInstanceOf[BoxFunc].func = func
case _: TypeThread => case _: TypeThreadRef =>
noAccessViaPointer(ptr, ty) noAccessViaPointer(ptr, ty)
val tid = memorySupport.loadLong(loc).toInt val tid = memorySupport.loadLong(loc).toInt
val thr = microVM.threadStackManager.getThreadByID(tid) val thr = microVM.threadStackManager.getThreadByID(tid)
br.asInstanceOf[BoxThread].thread = thr br.asInstanceOf[BoxThread].thread = thr
case _: TypeStack => case _: TypeStackRef =>
noAccessViaPointer(ptr, ty) noAccessViaPointer(ptr, ty)
val sid = memorySupport.loadLong(loc).toInt val sid = memorySupport.loadLong(loc).toInt
val sta = microVM.threadStackManager.getStackByID(sid) val sta = microVM.threadStackManager.getStackByID(sid)
...@@ -344,7 +344,7 @@ object MemoryOperations { ...@@ -344,7 +344,7 @@ object MemoryOperations {
noAccessViaPointer(ptr, ty) noAccessViaPointer(ptr, ty)
val raw = memorySupport.loadLong(loc) val raw = memorySupport.loadLong(loc)
br.asInstanceOf[BoxTagRef64].raw = raw br.asInstanceOf[BoxTagRef64].raw = raw
case _: TypePtr | _: TypeFuncPtr => case _: TypeUPtr | _: TypeUFuncPtr =>
val addr = memorySupport.loadLong(loc, !ptr) val addr = memorySupport.loadLong(loc, !ptr)
br.asInstanceOf[BoxPointer].addr = addr br.asInstanceOf[BoxPointer].addr = addr
case _ => throw new UnimplementedOprationException("Loading of type %s is not supporing".format(ty.getClass.getName)) case _ => throw new UnimplementedOprationException("Loading of type %s is not supporing".format(ty.getClass.getName))
...@@ -387,15 +387,15 @@ object MemoryOperations { ...@@ -387,15 +387,15 @@ object MemoryOperations {
val BoxIRef(base, offset) = nvb.asInstanceOf[BoxIRef] val BoxIRef(base, offset) = nvb.asInstanceOf[BoxIRef]
memorySupport.storeLong(loc, base) memorySupport.storeLong(loc, base)
memorySupport.storeLong(loc + WORD_SIZE_BYTES, offset) memorySupport.storeLong(loc + WORD_SIZE_BYTES, offset)
case _: TypeFunc => case _: TypeFuncRef =>
noAccessViaPointer(ptr, ty) noAccessViaPointer(ptr, ty)
val fid = nvb.asInstanceOf[BoxFunc].func.map(_.id).getOrElse(0) val fid = nvb.asInstanceOf[BoxFunc].func.map(_.id).getOrElse(0)
memorySupport.storeLong(loc, fid.toLong & 0xFFFFFFFFL) memorySupport.storeLong(loc, fid.toLong & 0xFFFFFFFFL)
case _: TypeThread => case _: TypeThreadRef =>
noAccessViaPointer(ptr, ty) noAccessViaPointer(ptr, ty)
val tid = nvb.asInstanceOf[BoxThread].thread.map(_.id).getOrElse(0) val tid = nvb.asInstanceOf[BoxThread].thread.map(_.id).getOrElse(0)
memorySupport.storeLong(loc, tid.toLong & 0xFFFFFFFFL) memorySupport.storeLong(loc, tid.toLong & 0xFFFFFFFFL)
case _: TypeStack => case _: TypeStackRef =>
noAccessViaPointer(ptr, ty) noAccessViaPointer(ptr, ty)
val sid = nvb.asInstanceOf[BoxStack].stack.map(_.id).getOrElse(0) val sid = nvb.asInstanceOf[BoxStack].stack.map(_.id).getOrElse(0)
memorySupport.storeLong(loc, sid.toLong & 0xFFFFFFFFL) memorySupport.storeLong(loc, sid.toLong & 0xFFFFFFFFL)
...@@ -403,7 +403,7 @@ object MemoryOperations { ...@@ -403,7 +403,7 @@ object MemoryOperations {
noAccessViaPointer(ptr, ty) noAccessViaPointer(ptr, ty)
val raw = nvb.asInstanceOf[BoxTagRef64].raw val raw = nvb.asInstanceOf[BoxTagRef64].raw
memorySupport.storeLong(loc, raw) memorySupport.storeLong(loc, raw)
case _: TypePtr | _: TypeFuncPtr => case _: TypeUPtr | _: TypeUFuncPtr =>
val addr = nvb.asInstanceOf[BoxPointer].addr val addr = nvb.asInstanceOf[BoxPointer].addr
memorySupport.storeLong(loc, addr, !ptr) memorySupport.storeLong(loc, addr, !ptr)
case _ => throw new UnimplementedOprationException("Storing of type %s is not supporing".format(ty.getClass.getName)) case _ => throw new UnimplementedOprationException("Storing of type %s is not supporing".format(ty.getClass.getName))
...@@ -456,7 +456,7 @@ object MemoryOperations { ...@@ -456,7 +456,7 @@ object MemoryOperations {
val (succ, (rl, rh)) = memorySupport.cmpXchgI128(loc, (el, eh), (dl, dh)) val (succ, (rl, rh)) = memorySupport.cmpXchgI128(loc, (el, eh), (dl, dh))
br.asInstanceOf[BoxIRef].oo = (rl, rh) br.asInstanceOf[BoxIRef].oo = (rl, rh)
succ succ
case _: TypeFunc => case _: TypeFuncRef =>
noAccessViaPointer(ptr, ty) noAccessViaPointer(ptr, ty)
val el = eb.asInstanceOf[BoxFunc].func.map(_.id).getOrElse(0).toLong val el = eb.asInstanceOf[BoxFunc].func.map(_.id).getOrElse(0).toLong
val dl = db.asInstanceOf[BoxFunc].func.map(_.id).getOrElse(0).toLong val dl = db.asInstanceOf[BoxFunc].func.map(_.id).getOrElse(0).toLong
...@@ -464,7 +464,7 @@ object MemoryOperations { ...@@ -464,7 +464,7 @@ object MemoryOperations {
val rf = microVM.globalBundle.funcNs.get(rl.toInt) val rf = microVM.globalBundle.funcNs.get(rl.toInt)
br.asInstanceOf[BoxFunc].func = rf br.asInstanceOf[BoxFunc].func = rf
succ succ
case _: TypeThread => case _: TypeThreadRef =>
noAccessViaPointer(ptr, ty) noAccessViaPointer(ptr, ty)
val el = eb.asInstanceOf[BoxThread].thread.map(_.id).getOrElse(0).toLong val el = eb.asInstanceOf[BoxThread].thread.map(_.id).getOrElse(0).toLong
val dl = db.asInstanceOf[BoxThread].thread.map(_.id).getOrElse(0).toLong val dl = db.asInstanceOf[BoxThread].thread.map(_.id).getOrElse(0).toLong
...@@ -472,7 +472,7 @@ object MemoryOperations { ...@@ -472,7 +472,7 @@ object MemoryOperations {
val rt = microVM.threadStackManager.getThreadByID(rl.toInt) val rt = microVM.threadStackManager.getThreadByID(rl.toInt)
br.asInstanceOf[BoxThread].thread = rt br.asInstanceOf[BoxThread].thread = rt
succ succ
case _: TypeStack => case _: TypeStackRef =>
noAccessViaPointer(ptr, ty) noAccessViaPointer(ptr, ty)
val el = eb.asInstanceOf[BoxStack].stack.map(_.id).getOrElse(0).toLong val el = eb.asInstanceOf[BoxStack].stack.map(_.id).getOrElse(0).toLong