Commit 2990e693 authored by George Rayns's avatar George Rayns

Miscellaneous changes, I'll sort through them later

parent c32fab8e
......@@ -17,6 +17,10 @@ class BundleConstructor(idNameMap: Map[MuID, MuName], nodeList: Seq[IRBuilderNod
def findNode[T <: IRBuilderNode](id: MuID): T = {
idNodeMap.getOrElse(id, {
val maybeName = idNameMap.get(id)
println("idNodeMap:")
println(idNodeMap)
println("idNameMap:")
println(idNameMap)
throw new NodeIDNotFoundException(id, maybeName)
}).asInstanceOf[T]
}
......
......@@ -30,8 +30,8 @@ import uvm.refimpl.cmdline.NativeArgv
object MicroVM {
val logger = Logger(LoggerFactory.getLogger(getClass.getName))
val DEFAULT_SOS_SIZE: Word = 2L * 1024L * 1024L; // 2MiB
val DEFAULT_LOS_SIZE: Word = 2L * 1024L * 1024L; // 2MiB
val DEFAULT_SOS_SIZE: Word = 16L * 1024L * 1024L; // 16MiB
val DEFAULT_LOS_SIZE: Word = 16L * 1024L * 1024L; // 16MiB
val DEFAULT_GLOBAL_SIZE: Word = 1L * 1024L * 1024L; // 1MiB
val DEFAULT_STACK_SIZE: Word = 63L * 1024L; // 60KiB per stack
......
......@@ -13,6 +13,7 @@ import uvm.ssavariables._
import uvm.ssavariables.AtomicRMWOptr._
import uvm.types._
import uvm.refimpl.nat.NativeMemoryAccessHelper
import InterpreterThread.logger
object OpHelper {
......@@ -252,6 +253,7 @@ object PrimOpHelpers {
if (op2v == 0) throw new UvmDivisionByZeroException(ctx + "Division by zero.")
}
logger.debug("op1: " + op1v + " op2: " + op2v)
up(op match {
case BinOptr.ADD => pu(op1v) + pu(op2v)
case BinOptr.SUB => pu(op1v) - pu(op2v)
......@@ -318,6 +320,7 @@ object PrimOpHelpers {
def pu(v: BigInt): BigInt = OpHelper.prepareUnsigned(v, l)
def ps(v: BigInt): BigInt = OpHelper.prepareSigned(v, l)
logger.debug("op1: " + op1v + " op2: " + op2v)
op match {
case CmpOptr.EQ => pu(op1v) == pu(op2v)
case CmpOptr.NE => pu(op1v) != pu(op2v)
......@@ -459,6 +462,7 @@ object MemoryOperations {
case _ => throw new UvmUnimplementedOperationException(
"Loading int of length %d is not supported".format(l))
}
logger.debug("Loaded: " + bi)
br.asInstanceOf[BoxInt].value = OpHelper.unprepare(bi, l)
case _: TypeFloat =>
val fv = memorySupport.loadFloat(loc, !ptr)
......
......@@ -32,7 +32,7 @@ object SimpleImmixSpace {
private val LINE_SIZE = 128L
private val N_BUCKETS = 256
private val N_BUCKETS = 1024
}
class SimpleImmixSpace(val heap: SimpleImmixHeap, name: String, begin: Word, extend: Word)(
......
......@@ -317,6 +317,7 @@ class NativeCallHelper {
BoxPointer(rv)
}
}
logger.debug("CCALL: Returned: " + b)
Some(b)
}
}
......
......@@ -504,7 +504,7 @@ class BundleChecker {
}
if (!(i.op2.inferredType shallowEq i.opndTy)) {
throw errorFBI(s"RHS ${i.op1} has type ${i.op1.inferredType}, which does not match the operand type ${i.opndTy}")
throw errorFBI(s"RHS ${i.op2} has type ${i.op2.inferredType}, which does not match the operand type ${i.opndTy}")
}
val nResults = i.results.length
......@@ -568,7 +568,7 @@ class BundleChecker {
}
if (!(i.op2.inferredType shallowEq i.opndTy)) {
throw errorFBI(s"RHS ${i.op1} has type ${i.op1.inferredType}, which does not match the operand type ${i.opndTy}")
throw errorFBI(s"RHS ${i.op2} has type ${i.op2.inferredType}, which does not match the operand type ${i.opndTy}")
}
}
case i: FixedAlloc => { // NEW, ALLOCA
......
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