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Commit 54354982 authored by Kunshan Wang's avatar Kunshan Wang
Browse files

STUB: command line interface

parent 50d1de21
...@@ -11,3 +11,4 @@ target ...@@ -11,3 +11,4 @@ target
hs_err_pid*.log hs_err_pid*.log
/bin/ /bin/
*.py[co] *.py[co]
classpath.txt
...@@ -47,5 +47,5 @@ makeClasspathFile := { ...@@ -47,5 +47,5 @@ makeClasspathFile := {
val cpStr = cp.mkString(":") val cpStr = cp.mkString(":")
IO.write(new java.io.File("cbinding/classpath.txt"), cpStr) IO.write(new java.io.File("classpath.txt"), cpStr)
} }
...@@ -39,11 +39,12 @@ libs: libmurefimpl2start.so ...@@ -39,11 +39,12 @@ libs: libmurefimpl2start.so
libmurefimpl2start.so: refimpl2-start.c classpath.h libmurefimpl2start.so: refimpl2-start.c classpath.h
$(CC) -fPIC -shared $(CFLAGS) -o $@ $< $(LDFLAGS) $(CC) -fPIC -shared $(CFLAGS) -o $@ $< $(LDFLAGS)
classpath.txt: ../build.sbt ../classpath.txt: ../build.sbt
cd .. ; sbt makeClasspathFile cd .. ; sbt makeClasspathFile
classpath.h: classpath.txt classpath.h: ../classpath.txt
xxd -i classpath.txt > classpath.h cp ../classpath.txt ./
xxd -i classpath.txt ./classpath.h
.PHONY: tests .PHONY: tests
tests: test_client test_client2 tests: test_client test_client2
......
package uvm.refimpl package uvm.refimpl
import java.io.OutputStreamWriter
import java.io.Writer import java.io.Writer
import scala.collection.mutable.HashSet import scala.collection.mutable.HashSet
...@@ -10,6 +12,7 @@ import uvm.ir.irbuilder.IRNode ...@@ -10,6 +12,7 @@ import uvm.ir.irbuilder.IRNode
import uvm.ir.textinput.UIRTextReader import uvm.ir.textinput.UIRTextReader
import uvm.ir.textoutput.BundleSerializer import uvm.ir.textoutput.BundleSerializer
import uvm.refimpl.bootimg.BootImageBuilder import uvm.refimpl.bootimg.BootImageBuilder
import uvm.refimpl.bootimg.BootImageLoader
import uvm.refimpl.hail.HailScriptLoader import uvm.refimpl.hail.HailScriptLoader
import uvm.refimpl.itpr._ import uvm.refimpl.itpr._
import uvm.refimpl.mem._ import uvm.refimpl.mem._
...@@ -18,8 +21,6 @@ import uvm.refimpl.nat.NativeCallHelper ...@@ -18,8 +21,6 @@ import uvm.refimpl.nat.NativeCallHelper
import uvm.refimpl.nat.NativeLibraryHolder import uvm.refimpl.nat.NativeLibraryHolder
import uvm.staticanalysis.StaticAnalyzer import uvm.staticanalysis.StaticAnalyzer
import uvm.utils.IDFactory import uvm.utils.IDFactory
import uvm.utils.SequentialIDFactory
import uvm.refimpl.bootimg.BootImageLoader
object MicroVM { object MicroVM {
val DEFAULT_SOS_SIZE: Word = 2L * 1024L * 1024L; // 2MiB val DEFAULT_SOS_SIZE: Word = 2L * 1024L * 1024L; // 2MiB
...@@ -38,7 +39,7 @@ object MicroVM { ...@@ -38,7 +39,7 @@ object MicroVM {
} }
} }
class MicroVM(vmConf: VMConf) { class MicroVM(val vmConf: VMConf) {
// implicitly injected resources // implicitly injected resources
private implicit val microVM = this private implicit val microVM = this
...@@ -160,13 +161,20 @@ class MicroVM(vmConf: VMConf) { ...@@ -160,13 +161,20 @@ class MicroVM(vmConf: VMConf) {
} }
/** /**
* * Print the global bundle to the writer w.
*/ */
def debugPrintGlobalBundle(w: Writer): Unit = { def debugPrintGlobalBundle(w: Writer): Unit = {
val bs = new BundleSerializer(globalBundle, globalBundle.allTopLevels().toSet) val bs = new BundleSerializer(globalBundle, globalBundle.allTopLevels().toSet)
bs.writeUIR(w) bs.writeUIR(w)
} }
/**
* Print the global bundle to stderr.
*/
def debugPrintGlobalBundle(): Unit = {
debugPrintGlobalBundle(new OutputStreamWriter(System.err))
}
/** /**
* Load from a boot image. * Load from a boot image.
*/ */
...@@ -181,4 +189,11 @@ class MicroVM(vmConf: VMConf) { ...@@ -181,4 +189,11 @@ class MicroVM(vmConf: VMConf) {
def execute(): Unit = { def execute(): Unit = {
threadStackManager.execute() threadStackManager.execute()
} }
// Automatically load the boot image if provided
{
vmConf.bootImg foreach { fileName =>
loadBootImage(fileName)
}
}
} }
\ No newline at end of file
package uvm.refimpl.cmdline
import uvm.refimpl.MicroVM
import uvm.refimpl.nat.ScalaCInitiater
/** Run Mu from the command line. */
object RunMu {
def main(args: Array[String]): Unit = {
println("Welcome!")
ScalaCInitiater.configureLog()
val configText = args.mkString("\n")
val microVM = MicroVM(configText)
println("Hello! this is micro VM!")
args foreach println
}
}
\ No newline at end of file
...@@ -24,23 +24,23 @@ private class MarkClearCheck extends LazyLogging { ...@@ -24,23 +24,23 @@ private class MarkClearCheck extends LazyLogging {
val markedRefs = new HashSet[Word]() val markedRefs = new HashSet[Word]()
val clearedRefs = new HashSet[Word]() val clearedRefs = new HashSet[Word]()
val diffRefs = new HashSet[Word]() val diffRefs = new HashSet[Word]()
def beforeMarking(): Unit = { def beforeMarking(): Unit = {
markedRefs.clear markedRefs.clear
} }
def marked(objRef: Word): Unit = { def marked(objRef: Word): Unit = {
markedRefs.add(objRef) markedRefs.add(objRef)
} }
def beforeClearing(): Unit = { def beforeClearing(): Unit = {
clearedRefs.clear clearedRefs.clear
} }
def cleared(objRef: Word): Unit = { def cleared(objRef: Word): Unit = {
clearedRefs.add(objRef) clearedRefs.add(objRef)
} }
def debugPrintStat(phase: String): Unit = { def debugPrintStat(phase: String): Unit = {
diffRefs.clear() diffRefs.clear()
for (r <- markedRefs if !clearedRefs.contains(r)) { for (r <- markedRefs if !clearedRefs.contains(r)) {
...@@ -69,21 +69,33 @@ class SimpleImmixCollector(val heap: SimpleImmixHeap, val space: SimpleImmixSpac ...@@ -69,21 +69,33 @@ class SimpleImmixCollector(val heap: SimpleImmixHeap, val space: SimpleImmixSpac
// The number of times GC has run. // The number of times GC has run.
private var gcCount: Int = 0 private var gcCount: Int = 0
private val MARK_CLEAR_DEBUG = false // Set to true if you want to check if any references are marked but not cleared private val MARK_CLEAR_DEBUG = false // Set to true if you want to check if any references are marked but not cleared
private val markClearCheck = if (MARK_CLEAR_DEBUG) Some(new MarkClearCheck()) else None private val markClearCheck = if (MARK_CLEAR_DEBUG) Some(new MarkClearCheck()) else None
protected override def collect() { protected override def collect() {
gcCount += 1 gcCount += 1
logger.debug(s"GC starts. gcCount=${gcCount}") logger.debug(s"GC starts. gcCount=${gcCount}")
if (logger.underlying.isDebugEnabled()) space.debugLogBlockStates() if (logger.underlying.isDebugEnabled()) space.debugLogBlockStates()
if (heap.gcDisabled) {
throw new UvmRefImplException(("GC is disabled. If this happens during boot-image loading, this means the micro VM " +
"does not have enough heap space. Try to increase the sosSize and losSize VM configuration parameters. " +
"Current sosSize=%d 0x%x, losSize=%d 0x%x, globalSize=%d 0x%x").format(
microVM.vmConf.sosSize,
microVM.vmConf.sosSize,
microVM.vmConf.losSize,
microVM.vmConf.losSize,
microVM.vmConf.globalSize,
microVM.vmConf.globalSize))
}
logger.debug("Clearing stats...") logger.debug("Clearing stats...")
space.clearStats() space.clearStats()
val weakRefs = new ArrayBuffer[Word]() val weakRefs = new ArrayBuffer[Word]()
markClearCheck.map(_.beforeMarking()) markClearCheck.map(_.beforeMarking())
logger.debug("Marking and getting statistics....") logger.debug("Marking and getting statistics....")
...@@ -144,11 +156,11 @@ class SimpleImmixCollector(val heap: SimpleImmixHeap, val space: SimpleImmixSpac ...@@ -144,11 +156,11 @@ class SimpleImmixCollector(val heap: SimpleImmixHeap, val space: SimpleImmixSpac
if (logger.underlying.isDebugEnabled()) space.debugLogBlockStates() if (logger.underlying.isDebugEnabled()) space.debugLogBlockStates()
markClearCheck.map(_.beforeClearing()) markClearCheck.map(_.beforeClearing())
logger.debug("Stat finished. Unmarking....") logger.debug("Stat finished. Unmarking....")
val s2 = new AllScanner(clearMarkHandler) val s2 = new AllScanner(clearMarkHandler)
s2.scanAll() s2.scanAll()
markClearCheck.map(_.debugPrintStat("2")) markClearCheck.map(_.debugPrintStat("2"))
if (logger.underlying.isDebugEnabled()) space.debugLogBlockStates() if (logger.underlying.isDebugEnabled()) space.debugLogBlockStates()
...@@ -160,7 +172,7 @@ class SimpleImmixCollector(val heap: SimpleImmixHeap, val space: SimpleImmixSpac ...@@ -160,7 +172,7 @@ class SimpleImmixCollector(val heap: SimpleImmixHeap, val space: SimpleImmixSpac
canDefrag = true canDefrag = true
if (logger.underlying.isDebugEnabled()) space.debugLogBlockStates() if (logger.underlying.isDebugEnabled()) space.debugLogBlockStates()
markClearCheck.map(_.beforeMarking()) markClearCheck.map(_.beforeMarking())
logger.debug("Mark again, maybe move objects....") logger.debug("Mark again, maybe move objects....")
...@@ -187,7 +199,7 @@ class SimpleImmixCollector(val heap: SimpleImmixHeap, val space: SimpleImmixSpac ...@@ -187,7 +199,7 @@ class SimpleImmixCollector(val heap: SimpleImmixHeap, val space: SimpleImmixSpac
notifyMovedObjectsToFutex() notifyMovedObjectsToFutex()
if (logger.underlying.isDebugEnabled()) space.debugLogBlockStates() if (logger.underlying.isDebugEnabled()) space.debugLogBlockStates()
markClearCheck.map(_.beforeClearing()) markClearCheck.map(_.beforeClearing())
logger.debug("Blocks collected. Unmarking....") logger.debug("Blocks collected. Unmarking....")
...@@ -196,7 +208,6 @@ class SimpleImmixCollector(val heap: SimpleImmixHeap, val space: SimpleImmixSpac ...@@ -196,7 +208,6 @@ class SimpleImmixCollector(val heap: SimpleImmixHeap, val space: SimpleImmixSpac
if (logger.underlying.isDebugEnabled()) space.debugLogBlockStates() if (logger.underlying.isDebugEnabled()) space.debugLogBlockStates()
logger.debug("GC finished.") logger.debug("GC finished.")
heap.untriggerGC() heap.untriggerGC()
} }
...@@ -302,18 +313,18 @@ class SimpleImmixCollector(val heap: SimpleImmixHeap, val space: SimpleImmixSpac ...@@ -302,18 +313,18 @@ class SimpleImmixCollector(val heap: SimpleImmixHeap, val space: SimpleImmixSpac
private def maybeMove(toObj: Word, updateFunc: Word => Unit): Option[Word] = { private def maybeMove(toObj: Word, updateFunc: Word => Unit): Option[Word] = {
val oldHeader = HeaderUtils.getTag(toObj) val oldHeader = HeaderUtils.getTag(toObj)
logger.debug("GC header of 0x%x is 0x%x".format(toObj, oldHeader)) logger.debug("GC header of 0x%x is 0x%x".format(toObj, oldHeader))
if (oldHeader == 0x0L) { if (oldHeader == 0x0L) {
logger.error("Header is zero! GC header of 0x%x is 0x%x".format(toObj, oldHeader)) logger.error("Header is zero! GC header of 0x%x is 0x%x".format(toObj, oldHeader))
val plusMinus = 256L val plusMinus = 256L
val memDump = HexDump.dumpMemory(toObj-plusMinus, plusMinus*2L) val memDump = HexDump.dumpMemory(toObj - plusMinus, plusMinus * 2L)
logger.error("Memory dump:\n"+memDump) logger.error("Memory dump:\n" + memDump)
throw new UvmRefImplException("Header is zero! obj: 0x%x, header: 0x%x".format(toObj, oldHeader)) throw new UvmRefImplException("Header is zero! obj: 0x%x, header: 0x%x".format(toObj, oldHeader))
} }
val markBit = oldHeader & MARK_MASK val markBit = oldHeader & MARK_MASK
val moveBit = oldHeader & MOVE_MASK val moveBit = oldHeader & MOVE_MASK
val wasMarked = markBit != 0 val wasMarked = markBit != 0
...@@ -401,11 +412,11 @@ class SimpleImmixCollector(val heap: SimpleImmixHeap, val space: SimpleImmixSpac ...@@ -401,11 +412,11 @@ class SimpleImmixCollector(val heap: SimpleImmixHeap, val space: SimpleImmixSpac
logger.debug("Copying old object 0x%x to 0x%x, %d bytes (aligned up to %d bytes).".format( logger.debug("Copying old object 0x%x to 0x%x, %d bytes (aligned up to %d bytes).".format(
oldObjRef, newObjRef, oldSize, alignedOldSize)) oldObjRef, newObjRef, oldSize, alignedOldSize))
MemUtils.memcpy(oldObjRef, newObjRef, alignedOldSize) MemUtils.memcpy(oldObjRef, newObjRef, alignedOldSize)
oldVarLen foreach { varLen => oldVarLen foreach { varLen =>
logger.debug("Copying old variable part length %d 0x%x to objref 0x%x".format(varLen, varLen, newObjRef)) logger.debug("Copying old variable part length %d 0x%x to objref 0x%x".format(varLen, varLen, newObjRef))
HeaderUtils.setVarLength(newObjRef, varLen) HeaderUtils.setVarLength(newObjRef, varLen)
} }
val newTag = newObjRef | MOVE_MASK val newTag = newObjRef | MOVE_MASK
HeaderUtils.setTag(oldObjRef, newTag) HeaderUtils.setTag(oldObjRef, newTag)
newObjRef newObjRef
......
...@@ -18,7 +18,7 @@ object ScalaCInitiater { ...@@ -18,7 +18,7 @@ object ScalaCInitiater {
private var isLogConfigured = false; private var isLogConfigured = false;
private def configureLog(): Unit = { def configureLog(): Unit = {
if (isLogConfigured) { if (isLogConfigured) {
return return
} }
......
#!/bin/bash
MYDIR=$(dirname $0)
CLASSPATH_TXT=${MYDIR}/../classpath.txt
if [[ ! -f ${CLASSPATH_TXT} ]]; then
echo "classpath.txt does not exist. Creating..."
pushd ..
sbt makeClasspathFile
popd
fi
JAVA_OPTS="-Xmx4096M" scala -cp $(< ${CLASSPATH_TXT}) uvm.refimpl.cmdline.RunMu $*
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