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Commit b39d6f9e authored by Kunshan Wang's avatar Kunshan Wang
Browse files

Testing IR builder...

parent d7a76d9e
...@@ -13,6 +13,13 @@ class BundleConstructor(idNameMap: Map[MuID, MuName], nodeList: Seq[IRBuilderNod ...@@ -13,6 +13,13 @@ class BundleConstructor(idNameMap: Map[MuID, MuName], nodeList: Seq[IRBuilderNod
val idNodeMap = nodeList.map(n => (n.id, n)).toMap val idNodeMap = nodeList.map(n => (n.id, n)).toMap
def findNode[T <: IRBuilderNode](id: MuID): T = {
idNodeMap.getOrElse(id, {
val maybeName = idNameMap.get(id)
throw new NodeIDNotFoundException(id, maybeName)
}).asInstanceOf[T]
}
val bundle = new TrantientBundle() val bundle = new TrantientBundle()
def setIDAndMaybeName[T <: IdentifiedSettable](obj: T, id: MuID): T = { def setIDAndMaybeName[T <: IdentifiedSettable](obj: T, id: MuID): T = {
...@@ -24,7 +31,8 @@ class BundleConstructor(idNameMap: Map[MuID, MuName], nodeList: Seq[IRBuilderNod ...@@ -24,7 +31,8 @@ class BundleConstructor(idNameMap: Map[MuID, MuName], nodeList: Seq[IRBuilderNod
def cascadeLookup[T <: Identified](id: MuID, ns1: Namespace[T], ns2: Namespace[T]): T = { def cascadeLookup[T <: Identified](id: MuID, ns1: Namespace[T], ns2: Namespace[T]): T = {
ns1.get(id).getOrElse { ns1.get(id).getOrElse {
ns2.get(id).getOrElse { ns2.get(id).getOrElse {
throw new UnknownIDException(id) val maybeName = idNameMap.get(id)
throw new UnknownIDException(id, maybeName)
} }
} }
} }
...@@ -51,7 +59,7 @@ class BundleConstructor(idNameMap: Map[MuID, MuName], nodeList: Seq[IRBuilderNod ...@@ -51,7 +59,7 @@ class BundleConstructor(idNameMap: Map[MuID, MuName], nodeList: Seq[IRBuilderNod
val t = resTy(id) val t = resTy(id)
if (!(expectedType.isAssignableFrom(t.getClass))) { if (!(expectedType.isAssignableFrom(t.getClass))) {
throw new IRBuilderException("Type id:%d name:%s does not match expected type. Expected %s, actually %s.".format( throw new IRBuilderException("Type id:%d name:%s does not match expected type. Expected %s, actually %s.".format(
id, idNameMap.getOrElse(id, "(no name)"), n, t)) id, idNameMap.getOrElse(id, "(no name)"), n, t))
} }
t.asInstanceOf[E] t.asInstanceOf[E]
} }
...@@ -203,8 +211,10 @@ class BundleConstructor(idNameMap: Map[MuID, MuName], nodeList: Seq[IRBuilderNod ...@@ -203,8 +211,10 @@ class BundleConstructor(idNameMap: Map[MuID, MuName], nodeList: Seq[IRBuilderNod
} }
def defineFunction(irNode: NodeFuncVer, muFuncVer: FuncVer): Unit = { def defineFunction(irNode: NodeFuncVer, muFuncVer: FuncVer): Unit = {
muFuncVer.bbs = new ArrayBuffer()
muFuncVer.bbNs = bundle.allNs.makeSubSpace("basic block")
val irBBmuBBs = irNode.bbs.map { bbID => val irBBmuBBs = irNode.bbs.map { bbID =>
val irBB = idNodeMap(bbID).asInstanceOf[NodeBB] val irBB = findNode[NodeBB](bbID)
val muBB = new BasicBlock(muFuncVer) val muBB = new BasicBlock(muFuncVer)
setIDAndMaybeName(muBB, bbID) setIDAndMaybeName(muBB, bbID)
muFuncVer.bbs += muBB muFuncVer.bbs += muBB
...@@ -213,6 +223,11 @@ class BundleConstructor(idNameMap: Map[MuID, MuName], nodeList: Seq[IRBuilderNod ...@@ -213,6 +223,11 @@ class BundleConstructor(idNameMap: Map[MuID, MuName], nodeList: Seq[IRBuilderNod
} }
for ((irBB, muBB) <- irBBmuBBs) { for ((irBB, muBB) <- irBBmuBBs) {
muBB.norParams = new ArrayBuffer()
muBB.excParam = None
muBB.insts = new ArrayBuffer()
muBB.localVarNs = bundle.allNs.makeSubSpace("local variable")
muBB.localInstNs = bundle.allNs.makeSubSpace("instruction")
for ((norParamID, norParamTyID) <- irBB.norParamIDs zip irBB.norParamTys) { for ((norParamID, norParamTyID) <- irBB.norParamIDs zip irBB.norParamTys) {
val muType = resTy(norParamTyID) val muType = resTy(norParamTyID)
val muNorParam = NorParam(muType) val muNorParam = NorParam(muType)
...@@ -229,7 +244,7 @@ class BundleConstructor(idNameMap: Map[MuID, MuName], nodeList: Seq[IRBuilderNod ...@@ -229,7 +244,7 @@ class BundleConstructor(idNameMap: Map[MuID, MuName], nodeList: Seq[IRBuilderNod
} }
for (instID <- irBB.insts) { for (instID <- irBB.insts) {
val irInst = idNodeMap(instID).asInstanceOf[IRInstNode] val irInst = findNode[IRInstNode](instID)
val muInst = defineInst(muFuncVer, muBB, irInst) val muInst = defineInst(muFuncVer, muBB, irInst)
setIDAndMaybeName(muInst, instID) setIDAndMaybeName(muInst, instID)
muBB.insts += muInst muBB.insts += muInst
...@@ -250,7 +265,7 @@ class BundleConstructor(idNameMap: Map[MuID, MuName], nodeList: Seq[IRBuilderNod ...@@ -250,7 +265,7 @@ class BundleConstructor(idNameMap: Map[MuID, MuName], nodeList: Seq[IRBuilderNod
cascadeLookup(id, bundle.globalVarNs, globalBundle.globalVarNs) cascadeLookup(id, bundle.globalVarNs, globalBundle.globalVarNs)
} }
} }
implicit def resVars(ids: Seq[MuVarNode]): Seq[SSAVariable] = { implicit def resVars(ids: Seq[MuVarNode]): Seq[SSAVariable] = {
ids.map(resVar) ids.map(resVar)
} }
...@@ -258,8 +273,9 @@ class BundleConstructor(idNameMap: Map[MuID, MuName], nodeList: Seq[IRBuilderNod ...@@ -258,8 +273,9 @@ class BundleConstructor(idNameMap: Map[MuID, MuName], nodeList: Seq[IRBuilderNod
// used by keepalives // used by keepalives
def resLocalVar(id: MuVarNode): LocalVariable = { def resLocalVar(id: MuVarNode): LocalVariable = {
localVarNs.get(id).getOrElse { localVarNs.get(id).getOrElse {
throw new IRBuilderException("Local variable id:%d name:%s not found".format(id, val vars = localVarNs.all.map(" " + _.repr).mkString("\n")
idNameMap.getOrElse(id, "(no name)"))) throw new IRBuilderException("Local variable id:%d name:%s not found.\nFYI: Current local variables are:\n%s".format(
id, idNameMap.getOrElse(id, "(no name)"), vars))
} }
} }
...@@ -270,37 +286,37 @@ class BundleConstructor(idNameMap: Map[MuID, MuName], nodeList: Seq[IRBuilderNod ...@@ -270,37 +286,37 @@ class BundleConstructor(idNameMap: Map[MuID, MuName], nodeList: Seq[IRBuilderNod
@inline @inline
implicit def resDestClause(id: MuDestClause): DestClause = { implicit def resDestClause(id: MuDestClause): DestClause = {
val NodeDestClause(_, dest, vars) = idNodeMap(id).asInstanceOf[NodeDestClause] val NodeDestClause(_, dest, vars) = findNode[NodeDestClause](id)
DestClause(dest, vars.map(resVar)) DestClause(dest, vars.map(resVar))
} }
@inline @inline
implicit def resExcClause(maybeID: Option[MuExcClause]): Option[ExcClause] = maybeID map { id => implicit def resExcClause(maybeID: Option[MuExcClause]): Option[ExcClause] = maybeID map { id =>
val irExcClause = idNodeMap(id).asInstanceOf[NodeExcClause] val irExcClause = findNode[NodeExcClause](id)
ExcClause(irExcClause.nor, irExcClause.exc) ExcClause(irExcClause.nor, irExcClause.exc)
} }
@inline @inline
implicit def resKeepalives(maybeID: Option[MuKeepaliveClause]): Seq[LocalVariable] = maybeID map { id => implicit def resKeepalives(maybeID: Option[MuKeepaliveClause]): Seq[LocalVariable] = maybeID map { id =>
val irKeepaliveClause = idNodeMap(id).asInstanceOf[NodeKeepaliveClause] val irKeepaliveClause = findNode[NodeKeepaliveClause](id)
irKeepaliveClause.vars.map(resLocalVar) irKeepaliveClause.vars.map(resLocalVar)
} getOrElse(Seq()) } getOrElse (Seq())
@inline @inline
implicit def resCurStackClause(id: MuCurStackClause): CurStackAction = { implicit def resCurStackClause(id: MuCurStackClause): CurStackAction = {
val irCurStackClause = idNodeMap(id).asInstanceOf[IRCurStackClauseNode] val irCurStackClause = findNode[IRCurStackClauseNode](id)
irCurStackClause match { irCurStackClause match {
case NodeCscRetWith(_, tys) => RetWith(tys) case NodeCscRetWith(_, tys) => RetWith(tys)
case NodeCscKillOld(_) => KillOld() case NodeCscKillOld(_) => KillOld()
} }
} }
@inline @inline
implicit def resNewStackClause(id: MuNewStackClause): NewStackAction = { implicit def resNewStackClause(id: MuNewStackClause): NewStackAction = {
val irNewStackClause = idNodeMap(id).asInstanceOf[IRNewStackClauseNode] val irNewStackClause = findNode[IRNewStackClauseNode](id)
irNewStackClause match { irNewStackClause match {
case NodeNscPassValues(_, tys, vars) => PassValues(tys, vars) case NodeNscPassValues(_, tys, vars) => PassValues(tys, vars)
case NodeNscThrowExc(_, exc) => ThrowExc(exc) case NodeNscThrowExc(_, exc) => ThrowExc(exc)
} }
} }
...@@ -321,7 +337,7 @@ class BundleConstructor(idNameMap: Map[MuID, MuName], nodeList: Seq[IRBuilderNod ...@@ -321,7 +337,7 @@ class BundleConstructor(idNameMap: Map[MuID, MuName], nodeList: Seq[IRBuilderNod
val caseDests = for ((c, d) <- cases zip dests) yield { val caseDests = for ((c, d) <- cases zip dests) yield {
(resConst(c), resDestClause(d)) (resConst(c), resDestClause(d))
} }
InstSwitch(opndTy, opnd, defaultDest, ArrayBuffer(caseDests:_*)) InstSwitch(opndTy, opnd, defaultDest, ArrayBuffer(caseDests: _*))
} }
case NodeCall(id, resultIDs, sig, callee, args, excClause, keepaliveClause) => case NodeCall(id, resultIDs, sig, callee, args, excClause, keepaliveClause) =>
InstCall(sig, callee, args, excClause, keepaliveClause) --> resultIDs InstCall(sig, callee, args, excClause, keepaliveClause) --> resultIDs
...@@ -384,11 +400,12 @@ class BundleConstructor(idNameMap: Map[MuID, MuName], nodeList: Seq[IRBuilderNod ...@@ -384,11 +400,12 @@ class BundleConstructor(idNameMap: Map[MuID, MuName], nodeList: Seq[IRBuilderNod
case NodeCommInst(id, resultIDs, opcode, flags, tys, sigs, args, excClause, keepaliveClause) => case NodeCommInst(id, resultIDs, opcode, flags, tys, sigs, args, excClause, keepaliveClause) =>
InstCommInst(opcode, flags, tys, sigs.map(resSig), args, excClause, keepaliveClause) --> resultIDs InstCommInst(opcode, flags, tys, sigs.map(resSig), args, excClause, keepaliveClause) --> resultIDs
} }
muInst.bb = muBB
muInst muInst
} catch { } catch {
case e: Exception => { case e: Exception => {
throw new IRBuilderException("Exception thrown when building instruction. Func: %s, ver: %s, bb: %s, inst: %d:%s".format( throw new IRBuilderException("Exception thrown when building instruction. Func: %s, ver: %s, bb: %s, inst: %d:%s".format(
muFuncVer.func.repr, muFuncVer.repr, muBB.repr, irInst.id, idNameMap.getOrElse(irInst.id, "(no name)")), e) muFuncVer.func.repr, muFuncVer.repr, muBB.repr, irInst.id, idNameMap.getOrElse(irInst.id, "(no name)")), e)
} }
} }
} }
...@@ -397,7 +414,7 @@ private object BundleConstructorImplicitMagics { ...@@ -397,7 +414,7 @@ private object BundleConstructorImplicitMagics {
implicit class AddResultsSeq[T <: Instruction](val inst: T) extends AnyVal { implicit class AddResultsSeq[T <: Instruction](val inst: T) extends AnyVal {
@inline @inline
def -->(resultIDs: Seq[MuID])(implicit self: BundleConstructor, localVarNs: Namespace[LocalVariable]): T = { def -->(resultIDs: Seq[MuID])(implicit self: BundleConstructor, localVarNs: Namespace[LocalVariable]): T = {
inst-->(resultIDs:_*) inst --> (resultIDs: _*)
} }
} }
implicit class AddResultsVarArg[T <: Instruction](val inst: T) extends AnyVal { implicit class AddResultsVarArg[T <: Instruction](val inst: T) extends AnyVal {
......
...@@ -96,6 +96,10 @@ class IRBuilder(val id: MuInternalID, ...@@ -96,6 +96,10 @@ class IRBuilder(val id: MuInternalID,
id id
} }
// Convenient functions for Scala
def genSym(): MuID = genSym(None)
def genSym(name: String): MuID = genSym(Some(name))
// The following functions are generated from irBuilderNodes.scala by /migrate_scripts/irbuildernodestoirbuildermethods.py // The following functions are generated from irBuilderNodes.scala by /migrate_scripts/irbuildernodestoirbuildermethods.py
// GEN:BEGIN:IRBUILDERNODE_CONSTRUCTORS // GEN:BEGIN:IRBUILDERNODE_CONSTRUCTORS
......
...@@ -2,6 +2,7 @@ package uvm.ir.irbuilder ...@@ -2,6 +2,7 @@ package uvm.ir.irbuilder
import uvm.UvmException import uvm.UvmException
import uvm.MuID import uvm.MuID
import uvm.MuName
/** Base class for exceptions thrown by the IR builder. */ /** Base class for exceptions thrown by the IR builder. */
class IRBuilderException(message: String = null, cause: Throwable = null) extends UvmException(message, cause) class IRBuilderException(message: String = null, cause: Throwable = null) extends UvmException(message, cause)
...@@ -17,9 +18,20 @@ class IllegalNameException(message: String = null, cause: Throwable = null) exte ...@@ -17,9 +18,20 @@ class IllegalNameException(message: String = null, cause: Throwable = null) exte
class IllegalSymbolException(message: String = null, cause: Throwable = null) extends IRBuilderException(message, cause) class IllegalSymbolException(message: String = null, cause: Throwable = null) extends IRBuilderException(message, cause)
/** /**
* Thrown if an ID cannot be resolved * Thrown if an ID does not correspond to any IR nodes
*/ */
class UnknownIDException(id: MuID, cause: Throwable = null) extends { class NodeIDNotFoundException(id: MuID, name: Option[MuName], cause: Throwable = null) extends {
private val msg = "ID %d not found".format(id) private val msg = ("Node id:%d, name:%s not found. " +
"Chance is that you created this ID using gen_sym, but did not define the actual node.").format(
id, name.getOrElse("(no name)"))
} with IRBuilderException(msg, cause) } with IRBuilderException(msg, cause)
/**
* Thrown if a MuID cannot be resolved
*/
class UnknownIDException(id: MuID, name: Option[MuName], cause: Throwable = null) extends {
private val msg = ("MuID %d (name: %s) is not defined" +
"If your Mu IR bundle refers to previously loaded entities, make sure the IDs are correct. " +
"If it refers to entities in the current bundle, make sure they have the appropriate types.").format(
id, name.getOrElse("(no name)"))
} with IRBuilderException(msg, cause)
...@@ -50,7 +50,7 @@ case class InstResult(inst: Instruction, index: Int) extends LocalVariable ...@@ -50,7 +50,7 @@ case class InstResult(inst: Instruction, index: Int) extends LocalVariable
abstract class Instruction extends ChildNode { abstract class Instruction extends ChildNode {
var bb: BasicBlock = null var bb: BasicBlock = null
var results: IndexedSeq[InstResult] = null var results: IndexedSeq[InstResult] = IndexedSeq()
override def toString = "[(%s) = %s %s]".format(this.results.map(_.repr).mkString(" "), this.repr, this.getClass.getSimpleName) override def toString = "[(%s) = %s %s]".format(this.results.map(_.repr).mkString(" "), this.repr, this.getClass.getSimpleName)
} }
......
...@@ -16,18 +16,6 @@ import uvm.ssavariables.MemoryOrder._ ...@@ -16,18 +16,6 @@ import uvm.ssavariables.MemoryOrder._
import uvm.types._ import uvm.types._
object MuCtxIRBuilderTest { object MuCtxIRBuilderTest {
// FIXME: implement the bundle builder
/*
import MuIRNodeAliases._
implicit class MagicalHandle[T <: Instruction](val handle: MuIRNode[T]) extends AnyVal {
def R(implicit ctx: MuCtx): MuInstResNode = ctx.getInstRes(handle, 0)
def R2(implicit ctx: MuCtx): (MuInstResNode, MuInstResNode) = {
val h0 = ctx.getInstRes(handle, 0)
val h1 = ctx.getInstRes(handle, 1)
(h0, h1)
}
}
} }
class MuCtxIRBuilderTest extends UvmBundleTesterBase with ExtraMatchers { class MuCtxIRBuilderTest extends UvmBundleTesterBase with ExtraMatchers {
...@@ -42,9 +30,9 @@ class MuCtxIRBuilderTest extends UvmBundleTesterBase with ExtraMatchers { ...@@ -42,9 +30,9 @@ class MuCtxIRBuilderTest extends UvmBundleTesterBase with ExtraMatchers {
it should "create an empty bundle" in { it should "create an empty bundle" in {
val ctx = microVM.newContext() val ctx = microVM.newContext()
val b = ctx.newBundle() val b = ctx.newIRBuilder()
ctx.loadBundleFromNode(b) b.load()
ctx.closeContext() ctx.closeContext()
} }
...@@ -52,64 +40,76 @@ class MuCtxIRBuilderTest extends UvmBundleTesterBase with ExtraMatchers { ...@@ -52,64 +40,76 @@ class MuCtxIRBuilderTest extends UvmBundleTesterBase with ExtraMatchers {
it should "create a bundle that contains types and sigs" in { it should "create a bundle that contains types and sigs" in {
val ctx = microVM.newContext() val ctx = microVM.newContext()
val b = ctx.newBundle() val b = ctx.newIRBuilder()
val hi1 = ctx.newTypeInt(b, 1) val i1 = b.genSym()
val hi8 = ctx.newTypeInt(b, 8) val i8 = b.genSym(None)
val hi8_id = ctx.getID(b, hi8) val i16 = b.genSym()
val hi16 = ctx.newTypeInt(b, 16) val i32 = b.genSym("@b1.i32")
val hi16_id = ctx.getID(b, hi16) val i64 = b.genSym(Some("@b1.i64"))
val hi32 = ctx.newTypeInt(b, 32) val f = b.genSym()
val hi32_id = ctx.getID(b, hi32) val d = b.genSym()
val hi64 = ctx.newTypeInt(b, 64) val s = b.genSym("@b1.s")
val hi64_id = ctx.getID(b, hi64) val h = b.genSym("@b1.h")
ctx.setName(b, hi64, "@i64") val a = b.genSym("@b1.a")
val hf = ctx.newTypeFloat(b) val v = b.genSym("@b1.v")
val hd = ctx.newTypeDouble(b) val sig = b.genSym("@b1.sig")
val hs = ctx.newTypeStruct(b, Seq(hi8, hi16, hi32, hi64)) val tr = b.genSym("@b1.tr64")
val hh = ctx.newTypeHybrid(b, Seq(hf, hd), hi8) val st = b.genSym("@b1.stack")
val ha = ctx.newTypeArray(b, hi8, 100) val th = b.genSym("@b1.thread")
val hv = ctx.newTypeVector(b, hf, 4) val fc = b.genSym("@b1.framecursor")
val ib = b.genSym("@b1.irbuilder")
val hsig = ctx.newFuncSig(b, Seq(hi8, hi16), Seq(hi32))
val hsig_id = ctx.getID(b, hsig) b.newTypeInt(i8, 8)
b.newTypeInt(i16, 16)
val htr64 = ctx.newTypeTagRef64(b) b.newTypeInt(i32, 32)
val hsr = ctx.newTypeStackRef(b) b.newTypeInt(i64, 64)
val htr = ctx.newTypeThreadRef(b)
val hfcr = ctx.newTypeFrameCursorRef(b) b.newTypeFloat(f)
val hinr = ctx.newTypeIRNodeRef(b) b.newTypeDouble(d)
b.newTypeStruct(s, Seq(i8, i16, i32, i64))
val hp = ctx.newTypeUPtr(b) b.newTypeHybrid(h, Seq(f, d), i8)
val hfp = ctx.newTypeUFuncPtr(b) b.newTypeArray(a, i8, 100)
val hr = ctx.newTypeRef(b) b.newTypeVector(v, f, 4)
val hir = ctx.newTypeIRef(b)
val hwr = ctx.newTypeWeakRef(b) b.newFuncSig(sig, Seq(i8, i16), Seq(i32))
val hfr = ctx.newTypeFuncRef(b)
b.newTypeTagRef64(tr)
ctx.setTypeUPtr(hp, hi64) b.newTypeStackRef(st)
ctx.setTypeUFuncPtr(hfp, hsig) b.newTypeThreadRef(th)
ctx.setTypeRef(hr, hi64) b.newTypeFrameCursorRef(fc)
ctx.setTypeIRef(hir, hi64) b.newTypeIRBuilderRef(ib)
ctx.setTypeWeakRef(hwr, hi64)
ctx.setTypeFuncRef(hfr, hsig) val p = b.genSym("@p")
val fp = b.genSym("@fp")
val hr1 = ctx.newTypeRef(b) val r = b.genSym()
val hs1 = ctx.newTypeStruct(b, Seq(hi64, hr1)) val ir = b.genSym()
ctx.setTypeRef(hr1, hs1) val wr = b.genSym()
val hr1_id = ctx.getID(b, hr1) val fr = b.genSym()
val hs1_id = ctx.getID(b, hs1)
b.newTypeUPtr(p, i64)
ctx.loadBundleFromNode(b) b.newTypeUFuncPtr(fp, sig)
b.newTypeRef(r, i64)
b.newTypeIRef(ir, i64)
b.newTypeWeakRef(wr, i64)
b.newTypeFuncRef(fr, sig)
val r1 = b.genSym()
val s1 = b.genSym()
b.newTypeRef(r1, s1)
b.newTypeStruct(s1, Seq(i64, r1))
b.load()
val gb = microVM.globalBundle val gb = microVM.globalBundle
gb.typeNs(hi64_id) shouldBeA[TypeInt] { its => its.length shouldBe 64 } gb.typeNs(i64) shouldBeA[TypeInt] { its => its.length shouldBe 64 }
gb.typeNs("@i64") shouldBe gb.typeNs(hi64_id) gb.typeNs("@b1.i64") shouldBe gb.typeNs(i64)
gb.typeNs(hr1_id) shouldBeA[TypeRef] { its => its.ty shouldBe gb.typeNs(hs1_id) } gb.typeNs(r1) shouldBeA[TypeRef] { its => its.ty shouldBe gb.typeNs(s1) }
gb.typeNs(hs1_id) shouldBeA[TypeStruct] { its => its.fieldTys shouldBe Seq(gb.typeNs(hi64_id), gb.typeNs(hr1_id)) } gb.typeNs(s1) shouldBeA[TypeStruct] { its => its.fieldTys shouldBe Seq(gb.typeNs(i64), gb.typeNs(r1)) }
gb.funcSigNs(hsig_id) shouldBeA[FuncSig] { its => gb.funcSigNs(sig) shouldBeA[FuncSig] { its =>
its.paramTys shouldBe Seq(gb.typeNs(hi8_id), gb.typeNs(hi16_id)) its.paramTys shouldBe Seq(gb.typeNs(i8), gb.typeNs(i16))
its.retTys shouldBe Seq(gb.typeNs(hi32_id)) its.retTys shouldBe Seq(gb.typeNs(i32))
} }
ctx.closeContext() ctx.closeContext()
...@@ -118,50 +118,57 @@ class MuCtxIRBuilderTest extends UvmBundleTesterBase with ExtraMatchers { ...@@ -118,50 +118,57 @@ class MuCtxIRBuilderTest extends UvmBundleTesterBase with ExtraMatchers {
it should "create a bundle with constants and global cells" in { it should "create a bundle with constants and global cells" in {
val ctx = microVM.newContext() val ctx = microVM.newContext()
val b = ctx.newBundle() val b = ctx.newIRBuilder()
val hi64 = ctx.newTypeInt(b, 64)
val hf = ctx.newTypeFloat(b) val i64 = b.genSym()
val hd = ctx.newTypeDouble(b) val f = b.genSym()
val hs = ctx.newTypeStruct(b, Seq(hi64, hi64)) val d = b.genSym()
val hr = ctx.newTypeRef(b) val s = b.genSym()
ctx.setTypeRef(hr, hi64) val r = b.genSym()
val hc1 = ctx.newConstInt(b, hi64, 0x123456789abcdef0L) b.newTypeInt(i64, 64)
val hc2 = ctx.newConstInt(b, hi64, 0xfedcba9876543210L) b.newTypeFloat(f)
val hc3 = ctx.newConstSeq(b, hs, Seq(hc1, hc2)) b.newTypeDouble(d)
val hc4 = ctx.newConstFloat(b, hf, 3.14F) b.newTypeStruct(s, Seq(i64, i64))
val hc5 = ctx.newConstDouble(b, hd, 3.14) b.newTypeRef(r, i64)
val hc6 = ctx.newConstNull(b, hr)
val c1 = b.genSym()
val hc1_id = ctx.getID(b, hc1) val c2 = b.genSym()
val hc2_id = ctx.getID(b, hc2) val c3 = b.genSym()
val hc3_id = ctx.getID(b, hc3) val c4 = b.genSym()
val hc4_id = ctx.getID(b, hc4) val c5 = b.genSym()
val hc5_id = ctx.getID(b, hc5) val c6 = b.genSym()
val hc6_id = ctx.getID(b, hc6)
b.newConstInt(c1, i64, 0x123456789abcdef0L)
val hg = ctx.newGlobalCell(b, hi64) b.newConstInt(c2, i64, 0xfedcba9876543210L)
val hg_id = ctx.getID(b, hg) b.newConstSeq(c3, s, Seq(c1, c2))
b.newConstFloat(c4, f, 3.14F)
b.newConstDouble(c5, d, 3.14)
b.newConstNull(c6, r)
val g = b.genSym()
b.newGlobalCell(g, i64)
ctx.loadBundleFromNode(b) b.load()
val gb = microVM.globalBundle val gb = microVM.globalBundle
gb.constantNs(hc1_id) shouldBeA[ConstInt] { its => its.num shouldBe 0x123456789abcdef0L } gb.constantNs(c1) shouldBeA[ConstInt] { its => its.num shouldBe 0x123456789abcdef0L }
gb.constantNs(hc2_id) shouldBeA[ConstInt] { its => its.num shouldBe 0xfedcba9876543210L } gb.constantNs(c2) shouldBeA[ConstInt] { its => its.num shouldBe 0xfedcba9876543210L }
gb.constantNs(hc3_id) shouldBeA[ConstSeq] { its => gb.constantNs(c3) shouldBeA[ConstSeq] { its =>
its.elems.map(_.asInstanceOf[ConstInt].num) shouldBe Seq(0x123456789abcdef0L, 0xfedcba9876543210L) its.elems.map(_.asInstanceOf[ConstInt].num) shouldBe Seq(0x123456789abcdef0L, 0xfedcba9876543210L)
} }
gb.constantNs(hc4_id) shouldBeA[ConstFloat] { its => its.num shouldBe 3.14f } gb.constantNs(c4) shouldBeA[ConstFloat] { its => its.num shouldBe 3.14f }
gb.constantNs(hc5_id) shouldBeA[ConstDouble] { its => its.num shouldBe 3.14 } gb.constantNs(c5) shouldBeA[ConstDouble] { its => its.num shouldBe 3.14 }
gb.constantNs(hc6_id) shouldBeA[ConstNull] thatsIt gb.constantNs(c6) shouldBeA[ConstNull] thatsIt
gb.globalCellNs(hg_id) shouldBeA[GlobalCell] { its => its.cellTy shouldBeA[TypeInt] { itss => itss.length shouldBe 64 }} gb.globalCellNs(g) shouldBeA[GlobalCell] { its => its.cellTy shouldBeA[TypeInt] { itss => itss.length shouldBe 64 }}
val hc1v = ctx.handleFromConst(hc1_id).asInstanceOf[MuIntValue] val hc1v = ctx.handleFromConst(c1).asInstanceOf[MuIntValue]
val hc1vv = ctx.handleToSInt(hc1v) val hc1vv = ctx.handleToSInt(hc1v)
hc1vv shouldBe 0x123456789abcdef0L hc1vv shouldBe 0x123456789abcdef0L
val hirg = ctx.handleFromGlobal(hg_id) val hirg = ctx.handleFromGlobal(g)
val hirg_v0 = ctx.load(NOT_ATOMIC, hirg).asInstanceOf[MuIntValue] val hirg_v0 = ctx.load(NOT_ATOMIC, hirg).asInstanceOf[MuIntValue]
val hirg_v0v = ctx.handleToSInt(hirg_v0) val hirg_v0v = ctx.handleToSInt(hirg_v0)
hirg_v0v shouldBe 0