.typedef @i1 = int<1> .typedef @i8 = int<8> .typedef @i16 = int<16> .typedef @i32 = int<32> .typedef @i64 = int<64> .typedef @float = float .typedef @double = double .typedef @void = void .typedef @rv = ref<@void> .typedef @irv = iref<@void> .typedef @wrv = weakref<@void> .typedef @ri32 = ref<@i32> .typedef @ri64 = ref<@i64> .typedef @ii32 = iref<@i32> .typedef @ii64 = iref<@i64> .typedef @ii8 = iref<@i8> .typedef @iii8 = iref<@ii8> .funcsig @npnr_sig = @void () .typedef @npnr_func = func<@npnr_sig> .funcsig @iii_sig = @i64 (@i64 @i64) .typedef @iii_func = func<@iii_sig> .typedef @thread = thread .typedef @stack = stack .typedef @tagref64 = tagref64 .typedef @4xfloat = vector <@float 4> .typedef @4xi32 = vector <@int 4> .typedef @2xdouble = vector <@double 2> .const @I8_0 <@i8> = 0 .const @I16_0 <@i16> = 0 .const @I32_0 <@i32> = 0 .const @I64_0 <@i64> = 0 .const @F_0 <@float> = 0.0f .const @D_0 <@float> = 0.0d .const @I8_1 <@i8> = 1 .const @I16_1 <@i16> = 1 .const @I32_1 <@i32> = 1 .const @I64_1 <@i64> = 1 .const @F_1 <@float> = 1.0f .const @D_1 <@float> = 1.0d .const @I32_2 <@i32> = 2 .const @I64_2 <@i32> = 2 .const @I64_42 <@i32> = 42 .const @I64_43 <@i32> = 43 .const @FALSE <@i1> = 0 .const @TRUE <@i1> = 1 .const @NULLREF <@rv> = NULL .funcsig @intBinOpTest_sig = @void (@i32 @i32) .funcdef @intBinOpTest VERSION @intBinOpTest_v1 <@intBinOpTest_sig> (%p0 %p1) { %entry: %add = ADD <@i32> %p0 %p1 %sub = SUB <@i32> %p0 %p1 %mul = MUL <@i32> %p0 %p1 %udiv = UDIV <@i32> %p0 %p1 %sdiv = SDIV <@i32> %p0 %p1 %urem = UREM <@i32> %p0 %p1 %srem = SREM <@i32> %p0 %p1 %shl = SHL <@i32> %p0 %p1 %lshr = LSHR <@i32> %p0 %p1 %ashr = ASHR <@i32> %p0 %p1 %and = AND <@i32> %p0 %p1 %or = OR <@i32> %p0 %p1 %xor = XOR <@i32> %p0 %p1 RETVOID } .funcsig @fpBinOpTest_sig = @void (@double @double) .funcdef @fpBinOpTest VERSION @fpBinOpTest_v1 <@fpBinOpTest_sig> (%p0 %p1) { %entry: %fadd = FADD <@double> %p0 %p1 %fsub = FSUB <@double> %p0 %p1 %fmul = FMUL <@double> %p0 %p1 %fdiv = FDIV <@double> %p0 %p1 %frem = FREM <@double> %p0 %p1 RETVOID } .funcsig @intCmpTest_sig = @void (@i64 @i64) .funcdef @intCmpTest VERSION @intCmpTest_v1 <@intCmpTest_sig> (%p0 %p1) { %entry: %eq = EQ <@i64> %p0 %p1 %ne = NE <@i64> %p0 %p1 %ult = ULT <@i64> %p0 %p1 %ule = ULE <@i64> %p0 %p1 %ugt = UGT <@i64> %p0 %p1 %uge = UGE <@i64> %p0 %p1 %slt = SLT <@i64> %p0 %p1 %sle = SLE <@i64> %p0 %p1 %sgt = SGT <@i64> %p0 %p1 %sge = SGE <@i64> %p0 %p1 RETVOID } .funcsig @fpCmpTest_sig = @void (@float @float) .funcdef @fpCmpTest VERSION @fpCmpTest_v1 <@fpCmpTest_sig> (%p0 %p1) { %entry: %ftrue = FTRUE <@float> %p0 %p1 %ffalse = FFALSE <@float> %p0 %p1 %ford = FORD <@float> %p0 %p1 %foeq = FOEQ <@float> %p0 %p1 %fone = FONE <@float> %p0 %p1 %folt = FOLT <@float> %p0 %p1 %fole = FOLE <@float> %p0 %p1 %fogt = FOGT <@float> %p0 %p1 %foge = FOGE <@float> %p0 %p1 %funo = FUNO <@float> %p0 %p1 %fueq = FUEQ <@float> %p0 %p1 %fune = FUNE <@float> %p0 %p1 %fult = FULT <@float> %p0 %p1 %fule = FULE <@float> %p0 %p1 %fugt = FUGT <@float> %p0 %p1 %fuge = FUGE <@float> %p0 %p1 RETVOID } .funcsig @convTest_sig = @void (@i32 @i64 @float @double) .funcdef @convTest VERSION @convTest_v1 <@convTest_sig> (%p0 %p1 %p2 %p3) { %entry: %trunc = TRUNC <@i64 @i32> %p1 %zext = ZEXT <@i32 @i64> %p0 %sext = SEXT <@i32 @i64> %p0 %fptrunc = FPTRUNC <@double @float> %p3 %fpext = FPEXT <@float @double> %p2 %fptoui = FPTOUI <@double @i64> %p3 %fptosi = FPTOSI <@double @i64> %p3 %uitofp = UITOFP <@i64 @double> %p1 %sitofp = SITOFP <@i64 @double> %p1 %bitcast0 = BITCAST <@i32 @float> %p0 %bitcast1 = BITCAST <@i64 @double> %p1 %bitcast2 = BITCAST <@float @i32> %p2 %bitcast3 = BITCAST <@double @i64> %p3 RETVOID } .funcsig @refCastTest_sig @void (@rv @irv @npnr_func) .funcdef @refCastTest VERSION @refCastTest_v1 <@refCastTest_sig> (%p0 %p1 %p2) { %entry: %refcast = REFCAST <@rv @ri32> %p0 %irefcast = REFCAST <@irv @ii64> %p1 %funccast = REFCAST <@npnr_func @iii_func> %p2 RETVOID } .funcsig @ctrlFlow_sig = @void (@i32) .funcdef @ctrlFlow VERSION @ctrlFlow_v1 <@ctrlFlow_sig> (%p0) { %entry: %br1 = BRANCH %head %head: %phi = PHI <@i32> { %entry: @I32_0; %next: %i2; } %zero = EQ <@i32> %p0 @I32_0 %br2 = BRANCH2 %zero %body %exit %body: %switch = SWITCH <@i32> %phi %other { @I32_1: %one; @I32_2: %two; } %one: %br3 = BRANCH %next %two: %br4 = BRANCH %next %other: %br5 = BRANCH %next %next: %i2 = SUB <@i32> %phi @I32_1 %br6 = BRANCH %head %exit: RETVOID } .funcdecl @callee1 <@npnr_sig> .funcdef @callee2 VERSION @callee2_v1 <@iiisig> (%p0 %p1) { %entry: %rv = ADD <@i64> %p0 %p1 %ret = RET <@i64> %rv } .funcdef @callee3 VERSION @callee3_v1 <@iiisig> (%p0 %p1) { %entry: %exc = NEW <@double> %throw = THROW %exc } .funcdef @caller1 VERSION @caller1_v1 <@npnr_sig> () { %entry: %v1 = CALL <@npnr_sig> @callee1 () %v2 = CALL <@iiisig> @callee2 (@I64_1 @I64_2) %v3 = CALL <@iiisig> @callee3 (@I64_1 @I64_2) EXC(%cont %catch) %cont: %v4 = CALL <@npnr_sig> @callee1 () KEEPALIVE(%v2 %v3) %v5 = CALL <@iiisig> @callee3 (%v3 %v3) EXC(%cont2 %catch) KEEPALIVE(%v2) %cont2: %retv = RETVOID %catch: %exc = LANDINGPAD RETVOID } .funcdef @caller2 VERSION @caller2_v1 <@iiisig> (%p0 %p1) { %entry: %tc = TAILCALL <@iiisig> @callee2 (%p0 %p1) } .typedef @sid = struct <@i64 @double> .const @sid1 <@sid> = {@I64_1 @D_1} .const @v1 <@4xfloat> = {@F_0 @F_0 @F_0 @F_0} .const @v2 <@4xfloat> = {@F_1 @F_1 @F_1 @F_1} .const @I32_4 <@i32> = 4 .const @I32_6 <@i32> = 6 .const @vshf <@4xi32> = {@I32_0 @I32_2 @I32_4 @I32_6} .funcdef @aggregate VERSION @aggregate_v1 <@npnr_sig> () { %entry: %e0 = EXTRACTVALUE <@sid 0> @sid1 %e1 = EXTRACTVALUE <@sid 1> @sid1 %i0 = INSERTVALUE <@sid 0> @sid1 @I64_0 %i1 = INSERTVALUE <@sid 1> @sid1 @D_0 %ee0 = EXTRACTELEMENT <@4xfloat @i32> @v1 @I32_0 %ie0 = INSERTELEMENT <@4xfloat @i32> @v1 @I32_1 @F_1 %fv0 = SHUFFLEVECTOR <@4xfloat @4xi32> @v1 @v2 @vshf RETVOID } .typedef @al = array <@i64 10> .typedef @hic = hybrid <@i64 @i8> .funcsig @memops_sig = @void <@i64 @i64> .funcdef @memops VERSION @memops_v1 <@memops_sig> (%p0 %p1) { %entry: %new = NEW <@i64> %newhybrid = NEWHYBRID <@hic> %p0 %alloca = ALLOCA <@i64 > %allocahybrid = ALLOCAHYBRID <@hic> %p0 %new_s = NEW <@i64> EXC(%bb2 %handler) %bb2: %newhybrid_s = NEWHYBRID <@hic> %p0 EXC(%bb3 %handler) %bb3: %alloca_s = ALLOCA <@i64 > EXC(%bb4 %handler) %bb4: %allocahybrid_s = ALLOCAHYBRID <@hic> %p0 EXC(%bb5 %handler) %bb5: %new2 = NEW <@sid> %alloca2 = ALLOCA <@al> %getiref = GETIREF <@sid> %new2 %getfieldiref = GETFIELDIREF <@sid 0> %getiref %getelemiref = GETELEMIREF <@al @i64> %alloca2 %p1 %getfixedpartiref = GETFIXEDPARTIREF <@hic> %allocahybrid %getvarpartiref = GETVARPARTIREF <@hic> %allocahybrid %shiftiref = SHIFTIREF <@i8 @i64> %getvarpartiref %p1 %load = LOAD <@i64> %alloca %store = STORE <@i64> %alloca @I64_42 %cmpxchg = CMPXCHG SEQ_CST SEQ_CST <@i64> %alloca @I64_42 @I64_0 %cmpxchg_w = CMPXCHG WEAK SEQ_CST SEQ_CST <@i64> %alloca @I64_42 @I64_0 %atomicrmw = ATOMICRMW SEQ_CST ADD <@i64> %alloca @I64_43 %load_s = LOAD <@i64> %alloca EXC(%bb6 %handler) %bb6 %store_s = STORE <@i64> %alloca @I64_42 EXC(%bb7 %handler) %bb7 %cmpxchg_s = CMPXCHG SEQ_CST SEQ_CST <@i64> %alloca @I64_42 @I64_0 EXC(%bb8 %handler) %bb8 %atomicrmw_s= ATOMICRMW SEQ_CST ADD <@i64> %alloca @I64_43 EXC(%bb9 %handler) %bb9 %fence = FENCE SEQ_CST RETVOID %handler: RETVOID } .funcsig @memorder_sig = @void (@ii64) .funcdef @memorder VERSION @memorder_v1 <@memorder_sig> (%p0) { %entry: %l0 = LOAD NOT_ATOMIC <@i64> %p0 %l1 = LOAD RELAXED <@i64> %p0 %l2 = LOAD CONSUME <@i64> %p0 %l3 = LOAD ACQUIRE <@i64> %p0 %s4 = STORE RELEASE <@i64> %p0 @I64_42 %c5 = CMPXCHG ACQ_REL <@i64> %p0 @I64_42 @I64_43 %l6 = LOAD SEQ_CST <@i64> %p0 RETVOID } .funcsig @atomicrmwops_sig = @void (@ii64 @i64) .funcdef @atomicrmwops VERSION @atomicrmwops_v1 <@atomicrmwops_sig> (%p0 %p1) { %entry: %old0 = ATOMICRMW ACQ_REL XCHG <@i64> %p0 %p1 %old1 = ATOMICRMW ACQ_REL ADD <@i64> %p0 %p1 %old2 = ATOMICRMW ACQ_REL SUB <@i64> %p0 %p1 %old3 = ATOMICRMW ACQ_REL AND <@i64> %p0 %p1 %old4 = ATOMICRMW ACQ_REL NAND <@i64> %p0 %p1 %old5 = ATOMICRMW ACQ_REL OR <@i64> %p0 %p1 %old6 = ATOMICRMW ACQ_REL XOR <@i64> %p0 %p1 %old7 = ATOMICRMW ACQ_REL MAX <@i64> %p0 %p1 %old8 = ATOMICRMW ACQ_REL MIN <@i64> %p0 %p1 %old9 = ATOMICRMW ACQ_REL UMAX <@i64> %p0 %p1 %olda = ATOMICRMW ACQ_REL UMIN <@i64> %p0 %p1 RETVOID } .funcdef @traps VERSION @traps_v1 <@npnr_sig> () { %entry: %a = ADD <@i64> @I64_42 @I64_43 %b = SUB <@i64> @I64_42 @I64_43 %c = MUL <@i64> @I64_42 @I64_43 %tp = TRAP <@i32> KEEPALIVE(%a) %tp_s = TRAP <@i64> EXC(%tp_s_cont %tp_s_exc) KEEPALIVE(%b) %tp_s_cont: %wp = WATCHPOINT 1 <@float> %wp_dis_cont %wp_ena_cont KEEPALIVE(%a) %wp_dis_cont: %wp_s = WATCHPOINT 2 <@double> %wp_s_dis_cont %wp_s_ena_cont WPEXC(%wp_s_exc) KEEPALIVE(%b) %wp_ena_cont: RETVOID %wp_s_dis_cont: RETVOID %wp_s_ena_cont: RETVOID %tp_s_exc: %exc = LANDINGPAD THROW %exc %wp_s_exc: %exc2 = LANDINGPAD THROW %exc2 } .funcsig @ccall_callee_sig = @void (@double) .funcsig @ccall_sig = @void (@i64) .funcdef @ccall VERSION @ccall_v1 <@ccall_sig> (%p0) { %entry: %rv = CCALL DEFAULT <@ccall_callee_sig @i64> %p0 (@D_1) RETVOID } .funcsig @gen_sig = @void (@stack) .funcdef @gen VERSION @gen_v1 <@npnr_sig> (%main) { %entry: %ss1 = SWAPSTACK %main RET_WITH<@void> PASS_VALUE(@i64_0) %ss2 = SWAPSTACK %main KILL_OLD THROW_EXC(@NULLREF) THROW @NULLREF // unreachable } .funcdef @swapstack VERSION @swapstack_v1 <@npnr_sig> () { %entry: %curstack = COMMINST @uvm.cur_stack %coro = NEWSTACK <@iiisig> @callee2 (%curstack) %ss1 = SWAPSTACK %coro RET_WITH<@i64> PASS_VOID %ss2 = SWAPSTACK %coro RET_WITH<@i64> PASS_VOID EXC(%nor %exc) %nor: RETVOID %exc: RETVOID } .funcdef @comminst VERSION @comminst_v1 <@npnr_sig> () { %entry: %curstack = COMMINST @uvm.cur_stack %sta = NEWSTACK <@iiisig> @callee2 (%curstack) %thr = COMMINST @new_stack (%sta) %th_ex = COMMINST @thread_exit RETVOID }