Commit 13ddfc19 authored by Kunshan Wang's avatar Kunshan Wang

Added an externally generated uir factorial program.

parent 1dc55f78
package junks
import uvm.refimpl._
object FactorialFromRPython extends App {
val microVM = new MicroVM()
val r = new java.io.FileReader("tests/extra-progs/factorial.uir")
val ca = microVM.newClientAgent()
ca.loadBundle(r)
// Magical trick. Theoretically the client would publish bundles as binary and knows all the IDs. But in this version
// only the text form is supported and IDs are automatically generated. So we look into the globalBundle itself.
val m = ca.putFunction(microVM.globalBundle.funcNs("@main").id)
microVM.trapManager.trapHandler = new TrapHandler {
override def handleTrap(ca: ClientAgent, thread: Handle, stack: Handle, watchPointID: Int): TrapHandlerResult = {
val curInst = ca.currentInstruction(stack, 0)
val trapName = microVM.globalBundle.varNs(curInst).name.get
if (trapName == "@main_v1.main_trap") {
val kas = ca.dumpKeepalives(stack, 0)
val Seq(rv) = kas
val i = ca.toInt(rv, signExt = true)
println(i)
} else {
throw new RuntimeException("Hit the wrong trap: " + trapName)
}
TrapRebindPassVoid(stack) // continue
}
}
val sta = ca.newStack(m, Seq())
val thr = ca.newThread(sta)
microVM.threadStackManager.joinAll() // run until all threads stop
ca.close()
}
\ No newline at end of file
.typedef @i32 = int<32>
.typedef @bool = int<1>
.const @I32_1 <@i32> = 1
.funcsig @fac_sig = @i32 (@i32)
.funcdef @fac VERSION @fac_v1 <@fac_sig> (%n_3)
{
%fac_block_0:
// %v46 = EQ <@i32> %n_3 %1
%v46 = EQ <@i32> %n_3 @I32_1
// %v47 = BITCAST <@bool @bool> %v46
// BRANCH2 %v47 %fac_block_2 %fac_block_1
BRANCH2 %v46 %fac_block_2 %fac_block_1
%fac_block_1:
// n_4 = PHI <@i32>
%n_4 = PHI <@i32>
{
// %fac_block_0: %n_3
%fac_block_0: %n_3 ;
// {
}
// %v48 = SUB <@i32> %n_4 %1
%v48 = SUB <@i32> %n_4 @I32_1
// %v49 = CALL <@fac_sig> @fac %v48
%v49 = CALL <@fac_sig> @fac (%v48)
%v50 = MUL <@i32> %n_4 %v49
BRANCH %fac_block_2
%fac_block_2:
// v51 = PHI <@i32>
%v51 = PHI <@i32>
{
//%fac_block_1: %v50
%fac_block_1: %v50 ;
// %fac_block_0: %1
%fac_block_0: @I32_1 ;
// {
}
// RET <@i32> v51
RET <@i32> %v51
}
.typedef @void = void
.const @I32_10 <@i32> = 10
.funcsig @main_sig = @void ()
.funcdef @main VERSION @main_v1 <@main_sig> () {
%entry:
%rv = CALL <@fac_sig> @fac (@I32_10)
%main_trap = TRAP <@void> KEEPALIVE (%rv)
COMMINST @uvm.thread_exit
}
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