Commit 2e5c2f30 authored by Kunshan Wang's avatar Kunshan Wang

sync with spec

parent bbd6780c
This diff is collapsed.
......@@ -405,63 +405,64 @@ common_instruction_opcodes = {
'@uvm.irbuilder.new_type_threadref': 0x312,
'@uvm.irbuilder.new_type_stackref': 0x313,
'@uvm.irbuilder.new_type_framecursorref': 0x314,
'@uvm.irbuilder.new_funcsig': 0x315,
'@uvm.irbuilder.new_const_int': 0x316,
'@uvm.irbuilder.new_const_int_ex': 0x317,
'@uvm.irbuilder.new_const_float': 0x318,
'@uvm.irbuilder.new_const_double': 0x319,
'@uvm.irbuilder.new_const_null': 0x31a,
'@uvm.irbuilder.new_const_seq': 0x31b,
'@uvm.irbuilder.new_const_extern': 0x31c,
'@uvm.irbuilder.new_global_cell': 0x31d,
'@uvm.irbuilder.new_func': 0x31e,
'@uvm.irbuilder.new_exp_func': 0x31f,
'@uvm.irbuilder.new_func_ver': 0x320,
'@uvm.irbuilder.new_bb': 0x321,
'@uvm.irbuilder.new_dest_clause': 0x322,
'@uvm.irbuilder.new_exc_clause': 0x323,
'@uvm.irbuilder.new_keepalive_clause': 0x324,
'@uvm.irbuilder.new_csc_ret_with': 0x325,
'@uvm.irbuilder.new_csc_kill_old': 0x326,
'@uvm.irbuilder.new_nsc_pass_values': 0x327,
'@uvm.irbuilder.new_nsc_throw_exc': 0x328,
'@uvm.irbuilder.new_binop': 0x329,
'@uvm.irbuilder.new_cmp': 0x32a,
'@uvm.irbuilder.new_conv': 0x32b,
'@uvm.irbuilder.new_select': 0x32c,
'@uvm.irbuilder.new_branch': 0x32d,
'@uvm.irbuilder.new_branch2': 0x32e,
'@uvm.irbuilder.new_switch': 0x32f,
'@uvm.irbuilder.new_call': 0x330,
'@uvm.irbuilder.new_tailcall': 0x331,
'@uvm.irbuilder.new_ret': 0x332,
'@uvm.irbuilder.new_throw': 0x333,
'@uvm.irbuilder.new_extractvalue': 0x334,
'@uvm.irbuilder.new_insertvalue': 0x335,
'@uvm.irbuilder.new_extractelement': 0x336,
'@uvm.irbuilder.new_insertelement': 0x337,
'@uvm.irbuilder.new_shufflevector': 0x338,
'@uvm.irbuilder.new_new': 0x339,
'@uvm.irbuilder.new_newhybrid': 0x33a,
'@uvm.irbuilder.new_alloca': 0x33b,
'@uvm.irbuilder.new_allocahybrid': 0x33c,
'@uvm.irbuilder.new_getiref': 0x33d,
'@uvm.irbuilder.new_getfieldiref': 0x33e,
'@uvm.irbuilder.new_getelemiref': 0x33f,
'@uvm.irbuilder.new_shiftiref': 0x340,
'@uvm.irbuilder.new_getvarpartiref': 0x341,
'@uvm.irbuilder.new_load': 0x342,
'@uvm.irbuilder.new_store': 0x343,
'@uvm.irbuilder.new_cmpxchg': 0x344,
'@uvm.irbuilder.new_atomicrmw': 0x345,
'@uvm.irbuilder.new_fence': 0x346,
'@uvm.irbuilder.new_trap': 0x347,
'@uvm.irbuilder.new_watchpoint': 0x348,
'@uvm.irbuilder.new_wpbranch': 0x349,
'@uvm.irbuilder.new_ccall': 0x34a,
'@uvm.irbuilder.new_newthread': 0x34b,
'@uvm.irbuilder.new_swapstack': 0x34c,
'@uvm.irbuilder.new_comminst': 0x34d,
'@uvm.irbuilder.new_type_irbuilderref': 0x315,
'@uvm.irbuilder.new_funcsig': 0x316,
'@uvm.irbuilder.new_const_int': 0x317,
'@uvm.irbuilder.new_const_int_ex': 0x318,
'@uvm.irbuilder.new_const_float': 0x319,
'@uvm.irbuilder.new_const_double': 0x31a,
'@uvm.irbuilder.new_const_null': 0x31b,
'@uvm.irbuilder.new_const_seq': 0x31c,
'@uvm.irbuilder.new_const_extern': 0x31d,
'@uvm.irbuilder.new_global_cell': 0x31e,
'@uvm.irbuilder.new_func': 0x31f,
'@uvm.irbuilder.new_exp_func': 0x320,
'@uvm.irbuilder.new_func_ver': 0x321,
'@uvm.irbuilder.new_bb': 0x322,
'@uvm.irbuilder.new_dest_clause': 0x323,
'@uvm.irbuilder.new_exc_clause': 0x324,
'@uvm.irbuilder.new_keepalive_clause': 0x325,
'@uvm.irbuilder.new_csc_ret_with': 0x326,
'@uvm.irbuilder.new_csc_kill_old': 0x327,
'@uvm.irbuilder.new_nsc_pass_values': 0x328,
'@uvm.irbuilder.new_nsc_throw_exc': 0x329,
'@uvm.irbuilder.new_binop': 0x32a,
'@uvm.irbuilder.new_cmp': 0x32b,
'@uvm.irbuilder.new_conv': 0x32c,
'@uvm.irbuilder.new_select': 0x32d,
'@uvm.irbuilder.new_branch': 0x32e,
'@uvm.irbuilder.new_branch2': 0x32f,
'@uvm.irbuilder.new_switch': 0x330,
'@uvm.irbuilder.new_call': 0x331,
'@uvm.irbuilder.new_tailcall': 0x332,
'@uvm.irbuilder.new_ret': 0x333,
'@uvm.irbuilder.new_throw': 0x334,
'@uvm.irbuilder.new_extractvalue': 0x335,
'@uvm.irbuilder.new_insertvalue': 0x336,
'@uvm.irbuilder.new_extractelement': 0x337,
'@uvm.irbuilder.new_insertelement': 0x338,
'@uvm.irbuilder.new_shufflevector': 0x339,
'@uvm.irbuilder.new_new': 0x33a,
'@uvm.irbuilder.new_newhybrid': 0x33b,
'@uvm.irbuilder.new_alloca': 0x33c,
'@uvm.irbuilder.new_allocahybrid': 0x33d,
'@uvm.irbuilder.new_getiref': 0x33e,
'@uvm.irbuilder.new_getfieldiref': 0x33f,
'@uvm.irbuilder.new_getelemiref': 0x340,
'@uvm.irbuilder.new_shiftiref': 0x341,
'@uvm.irbuilder.new_getvarpartiref': 0x342,
'@uvm.irbuilder.new_load': 0x343,
'@uvm.irbuilder.new_store': 0x344,
'@uvm.irbuilder.new_cmpxchg': 0x345,
'@uvm.irbuilder.new_atomicrmw': 0x346,
'@uvm.irbuilder.new_fence': 0x347,
'@uvm.irbuilder.new_trap': 0x348,
'@uvm.irbuilder.new_watchpoint': 0x349,
'@uvm.irbuilder.new_wpbranch': 0x34a,
'@uvm.irbuilder.new_ccall': 0x34b,
'@uvm.irbuilder.new_newthread': 0x34c,
'@uvm.irbuilder.new_swapstack': 0x34d,
'@uvm.irbuilder.new_comminst': 0x34e,
}
## GEN:END:CENUMS
......
......@@ -2250,63 +2250,64 @@ val MU_CI_UVM_IRBUILDER_NEW_TYPE_TAGREF64 = 0x311
val MU_CI_UVM_IRBUILDER_NEW_TYPE_THREADREF = 0x312
val MU_CI_UVM_IRBUILDER_NEW_TYPE_STACKREF = 0x313
val MU_CI_UVM_IRBUILDER_NEW_TYPE_FRAMECURSORREF = 0x314
val MU_CI_UVM_IRBUILDER_NEW_FUNCSIG = 0x315
val MU_CI_UVM_IRBUILDER_NEW_CONST_INT = 0x316
val MU_CI_UVM_IRBUILDER_NEW_CONST_INT_EX = 0x317
val MU_CI_UVM_IRBUILDER_NEW_CONST_FLOAT = 0x318
val MU_CI_UVM_IRBUILDER_NEW_CONST_DOUBLE = 0x319
val MU_CI_UVM_IRBUILDER_NEW_CONST_NULL = 0x31a
val MU_CI_UVM_IRBUILDER_NEW_CONST_SEQ = 0x31b
val MU_CI_UVM_IRBUILDER_NEW_CONST_EXTERN = 0x31c
val MU_CI_UVM_IRBUILDER_NEW_GLOBAL_CELL = 0x31d
val MU_CI_UVM_IRBUILDER_NEW_FUNC = 0x31e
val MU_CI_UVM_IRBUILDER_NEW_EXP_FUNC = 0x31f
val MU_CI_UVM_IRBUILDER_NEW_FUNC_VER = 0x320
val MU_CI_UVM_IRBUILDER_NEW_BB = 0x321
val MU_CI_UVM_IRBUILDER_NEW_DEST_CLAUSE = 0x322
val MU_CI_UVM_IRBUILDER_NEW_EXC_CLAUSE = 0x323
val MU_CI_UVM_IRBUILDER_NEW_KEEPALIVE_CLAUSE = 0x324
val MU_CI_UVM_IRBUILDER_NEW_CSC_RET_WITH = 0x325
val MU_CI_UVM_IRBUILDER_NEW_CSC_KILL_OLD = 0x326
val MU_CI_UVM_IRBUILDER_NEW_NSC_PASS_VALUES = 0x327
val MU_CI_UVM_IRBUILDER_NEW_NSC_THROW_EXC = 0x328
val MU_CI_UVM_IRBUILDER_NEW_BINOP = 0x329
val MU_CI_UVM_IRBUILDER_NEW_CMP = 0x32a
val MU_CI_UVM_IRBUILDER_NEW_CONV = 0x32b
val MU_CI_UVM_IRBUILDER_NEW_SELECT = 0x32c
val MU_CI_UVM_IRBUILDER_NEW_BRANCH = 0x32d
val MU_CI_UVM_IRBUILDER_NEW_BRANCH2 = 0x32e
val MU_CI_UVM_IRBUILDER_NEW_SWITCH = 0x32f
val MU_CI_UVM_IRBUILDER_NEW_CALL = 0x330
val MU_CI_UVM_IRBUILDER_NEW_TAILCALL = 0x331
val MU_CI_UVM_IRBUILDER_NEW_RET = 0x332
val MU_CI_UVM_IRBUILDER_NEW_THROW = 0x333
val MU_CI_UVM_IRBUILDER_NEW_EXTRACTVALUE = 0x334
val MU_CI_UVM_IRBUILDER_NEW_INSERTVALUE = 0x335
val MU_CI_UVM_IRBUILDER_NEW_EXTRACTELEMENT = 0x336
val MU_CI_UVM_IRBUILDER_NEW_INSERTELEMENT = 0x337
val MU_CI_UVM_IRBUILDER_NEW_SHUFFLEVECTOR = 0x338
val MU_CI_UVM_IRBUILDER_NEW_NEW = 0x339
val MU_CI_UVM_IRBUILDER_NEW_NEWHYBRID = 0x33a
val MU_CI_UVM_IRBUILDER_NEW_ALLOCA = 0x33b
val MU_CI_UVM_IRBUILDER_NEW_ALLOCAHYBRID = 0x33c
val MU_CI_UVM_IRBUILDER_NEW_GETIREF = 0x33d
val MU_CI_UVM_IRBUILDER_NEW_GETFIELDIREF = 0x33e
val MU_CI_UVM_IRBUILDER_NEW_GETELEMIREF = 0x33f
val MU_CI_UVM_IRBUILDER_NEW_SHIFTIREF = 0x340
val MU_CI_UVM_IRBUILDER_NEW_GETVARPARTIREF = 0x341
val MU_CI_UVM_IRBUILDER_NEW_LOAD = 0x342
val MU_CI_UVM_IRBUILDER_NEW_STORE = 0x343
val MU_CI_UVM_IRBUILDER_NEW_CMPXCHG = 0x344
val MU_CI_UVM_IRBUILDER_NEW_ATOMICRMW = 0x345
val MU_CI_UVM_IRBUILDER_NEW_FENCE = 0x346
val MU_CI_UVM_IRBUILDER_NEW_TRAP = 0x347
val MU_CI_UVM_IRBUILDER_NEW_WATCHPOINT = 0x348
val MU_CI_UVM_IRBUILDER_NEW_WPBRANCH = 0x349
val MU_CI_UVM_IRBUILDER_NEW_CCALL = 0x34a
val MU_CI_UVM_IRBUILDER_NEW_NEWTHREAD = 0x34b
val MU_CI_UVM_IRBUILDER_NEW_SWAPSTACK = 0x34c
val MU_CI_UVM_IRBUILDER_NEW_COMMINST = 0x34d
val MU_CI_UVM_IRBUILDER_NEW_TYPE_IRBUILDERREF = 0x315
val MU_CI_UVM_IRBUILDER_NEW_FUNCSIG = 0x316
val MU_CI_UVM_IRBUILDER_NEW_CONST_INT = 0x317
val MU_CI_UVM_IRBUILDER_NEW_CONST_INT_EX = 0x318
val MU_CI_UVM_IRBUILDER_NEW_CONST_FLOAT = 0x319
val MU_CI_UVM_IRBUILDER_NEW_CONST_DOUBLE = 0x31a
val MU_CI_UVM_IRBUILDER_NEW_CONST_NULL = 0x31b
val MU_CI_UVM_IRBUILDER_NEW_CONST_SEQ = 0x31c
val MU_CI_UVM_IRBUILDER_NEW_CONST_EXTERN = 0x31d
val MU_CI_UVM_IRBUILDER_NEW_GLOBAL_CELL = 0x31e
val MU_CI_UVM_IRBUILDER_NEW_FUNC = 0x31f
val MU_CI_UVM_IRBUILDER_NEW_EXP_FUNC = 0x320
val MU_CI_UVM_IRBUILDER_NEW_FUNC_VER = 0x321
val MU_CI_UVM_IRBUILDER_NEW_BB = 0x322
val MU_CI_UVM_IRBUILDER_NEW_DEST_CLAUSE = 0x323
val MU_CI_UVM_IRBUILDER_NEW_EXC_CLAUSE = 0x324
val MU_CI_UVM_IRBUILDER_NEW_KEEPALIVE_CLAUSE = 0x325
val MU_CI_UVM_IRBUILDER_NEW_CSC_RET_WITH = 0x326
val MU_CI_UVM_IRBUILDER_NEW_CSC_KILL_OLD = 0x327
val MU_CI_UVM_IRBUILDER_NEW_NSC_PASS_VALUES = 0x328
val MU_CI_UVM_IRBUILDER_NEW_NSC_THROW_EXC = 0x329
val MU_CI_UVM_IRBUILDER_NEW_BINOP = 0x32a
val MU_CI_UVM_IRBUILDER_NEW_CMP = 0x32b
val MU_CI_UVM_IRBUILDER_NEW_CONV = 0x32c
val MU_CI_UVM_IRBUILDER_NEW_SELECT = 0x32d
val MU_CI_UVM_IRBUILDER_NEW_BRANCH = 0x32e
val MU_CI_UVM_IRBUILDER_NEW_BRANCH2 = 0x32f
val MU_CI_UVM_IRBUILDER_NEW_SWITCH = 0x330
val MU_CI_UVM_IRBUILDER_NEW_CALL = 0x331
val MU_CI_UVM_IRBUILDER_NEW_TAILCALL = 0x332
val MU_CI_UVM_IRBUILDER_NEW_RET = 0x333
val MU_CI_UVM_IRBUILDER_NEW_THROW = 0x334
val MU_CI_UVM_IRBUILDER_NEW_EXTRACTVALUE = 0x335
val MU_CI_UVM_IRBUILDER_NEW_INSERTVALUE = 0x336
val MU_CI_UVM_IRBUILDER_NEW_EXTRACTELEMENT = 0x337
val MU_CI_UVM_IRBUILDER_NEW_INSERTELEMENT = 0x338
val MU_CI_UVM_IRBUILDER_NEW_SHUFFLEVECTOR = 0x339
val MU_CI_UVM_IRBUILDER_NEW_NEW = 0x33a
val MU_CI_UVM_IRBUILDER_NEW_NEWHYBRID = 0x33b
val MU_CI_UVM_IRBUILDER_NEW_ALLOCA = 0x33c
val MU_CI_UVM_IRBUILDER_NEW_ALLOCAHYBRID = 0x33d
val MU_CI_UVM_IRBUILDER_NEW_GETIREF = 0x33e
val MU_CI_UVM_IRBUILDER_NEW_GETFIELDIREF = 0x33f
val MU_CI_UVM_IRBUILDER_NEW_GETELEMIREF = 0x340
val MU_CI_UVM_IRBUILDER_NEW_SHIFTIREF = 0x341
val MU_CI_UVM_IRBUILDER_NEW_GETVARPARTIREF = 0x342
val MU_CI_UVM_IRBUILDER_NEW_LOAD = 0x343
val MU_CI_UVM_IRBUILDER_NEW_STORE = 0x344
val MU_CI_UVM_IRBUILDER_NEW_CMPXCHG = 0x345
val MU_CI_UVM_IRBUILDER_NEW_ATOMICRMW = 0x346
val MU_CI_UVM_IRBUILDER_NEW_FENCE = 0x347
val MU_CI_UVM_IRBUILDER_NEW_TRAP = 0x348
val MU_CI_UVM_IRBUILDER_NEW_WATCHPOINT = 0x349
val MU_CI_UVM_IRBUILDER_NEW_WPBRANCH = 0x34a
val MU_CI_UVM_IRBUILDER_NEW_CCALL = 0x34b
val MU_CI_UVM_IRBUILDER_NEW_NEWTHREAD = 0x34c
val MU_CI_UVM_IRBUILDER_NEW_SWAPSTACK = 0x34d
val MU_CI_UVM_IRBUILDER_NEW_COMMINST = 0x34e
def toBinOptr(cval: MuBinOptr): BinOptr.Value = cval match {
case 0x01 => BinOptr.ADD
case 0x02 => BinOptr.SUB
......
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