Commit 55fdbd3c authored by Kunshan Wang's avatar Kunshan Wang

Run static analyzer by default.

Now MicroVM runs the static analyzer when adding any bundles.
parent f31651a4
...@@ -2,18 +2,18 @@ package uvm.comminsts ...@@ -2,18 +2,18 @@ package uvm.comminsts
import uvm._ import uvm._
case class CommInst(val id: Int, val name: Option[String]) extends Identified case class CommInst(val id: Int, val name: Option[String], val isTerminator: Boolean) extends Identified
object CommInsts extends SimpleNamespace[CommInst] { object CommInsts extends SimpleNamespace[CommInst] {
private def commInst(id: Int, name: String) { private def commInst(id: Int, name: String, isTerminator: Boolean = false) {
val ci = CommInst(id, Some(name)) val ci = CommInst(id, Some(name), isTerminator)
add(ci) add(ci)
} }
commInst(0x201, "@uvm.new_stack") commInst(0x201, "@uvm.new_stack")
commInst(0x202, "@uvm.kill_stack") commInst(0x202, "@uvm.kill_stack")
commInst(0x203, "@uvm.thread_exit") commInst(0x203, "@uvm.thread_exit", isTerminator = true)
commInst(0x204, "@uvm.current_stack") commInst(0x204, "@uvm.current_stack")
commInst(0x211, "@uvm.tr64.is_fp") commInst(0x211, "@uvm.tr64.is_fp")
......
...@@ -10,6 +10,7 @@ import uvm.refimpl.itpr._ ...@@ -10,6 +10,7 @@ import uvm.refimpl.itpr._
import uvm.refimpl.mem._ import uvm.refimpl.mem._
import uvm.refimpl.mem.TypeSizes.Word import uvm.refimpl.mem.TypeSizes.Word
import uvm.refimpl.nat.NativeCallHelper import uvm.refimpl.nat.NativeCallHelper
import uvm.staticanalysis.StaticAnalyzer
object MicroVM { object MicroVM {
val DEFAULT_HEAP_SIZE: Word = 4L * 1024L * 1024L; // 4MiB val DEFAULT_HEAP_SIZE: Word = 4L * 1024L * 1024L; // 4MiB
...@@ -41,6 +42,7 @@ class MicroVM(heapSize: Word = MicroVM.DEFAULT_HEAP_SIZE, ...@@ -41,6 +42,7 @@ class MicroVM(heapSize: Word = MicroVM.DEFAULT_HEAP_SIZE,
val irReader = new UIRTextReader(new IDFactory(MicroVM.FIRST_CLIENT_USABLE_ID)) val irReader = new UIRTextReader(new IDFactory(MicroVM.FIRST_CLIENT_USABLE_ID))
val hailScriptLoader = new HailScriptLoader() val hailScriptLoader = new HailScriptLoader()
val staticAnalyzer = new StaticAnalyzer()
{ {
// VOID, BYTE, BYTE_ARRAY: The micro VM allocates stacks on the heap in the large object space. // VOID, BYTE, BYTE_ARRAY: The micro VM allocates stacks on the heap in the large object space.
...@@ -66,6 +68,8 @@ class MicroVM(heapSize: Word = MicroVM.DEFAULT_HEAP_SIZE, ...@@ -66,6 +68,8 @@ class MicroVM(heapSize: Word = MicroVM.DEFAULT_HEAP_SIZE,
* Add things from a bundle to the Micro VM. * Add things from a bundle to the Micro VM.
*/ */
def addBundle(bundle: TrantientBundle) { def addBundle(bundle: TrantientBundle) {
staticAnalyzer.checkBundle(bundle, Some(globalBundle))
globalBundle.merge(bundle); globalBundle.merge(bundle);
for (gc <- bundle.globalCellNs.all) { for (gc <- bundle.globalCellNs.all) {
......
...@@ -255,8 +255,12 @@ case class InstCCall(var callConv: Flag, var funcTy: Type, var sig: FuncSig, var ...@@ -255,8 +255,12 @@ case class InstCCall(var callConv: Flag, var funcTy: Type, var sig: FuncSig, var
case class InstNewThread(var stack: SSAVariable, var newStackAction: NewStackAction, var excClause: Option[ExcClause]) extends Instruction with HasExcClause case class InstNewThread(var stack: SSAVariable, var newStackAction: NewStackAction, var excClause: Option[ExcClause]) extends Instruction with HasExcClause
case class InstSwapStack(var swappee: SSAVariable, var curStackAction: CurStackAction, var newStackAction: NewStackAction, case class InstSwapStack(var swappee: SSAVariable, var curStackAction: CurStackAction, var newStackAction: NewStackAction,
var excClause: Option[ExcClause], var keepAlives: Seq[LocalVariable]) extends HasExcClause with HasKeepAliveClause with OSRPoint var excClause: Option[ExcClause], var keepAlives: Seq[LocalVariable]) extends HasExcClause with HasKeepAliveClause with OSRPoint {
override def canTerminate: Boolean = curStackAction == KillOld() || excClause.isDefined
}
case class InstCommInst(var inst: CommInst, var flagList: Seq[Flag], var typeList: Seq[Type], var funcSigList: Seq[FuncSig], var argList: Seq[SSAVariable], case class InstCommInst(var inst: CommInst, var flagList: Seq[Flag], var typeList: Seq[Type], var funcSigList: Seq[FuncSig], var argList: Seq[SSAVariable],
var excClause: Option[ExcClause], var keepAlives: Seq[LocalVariable]) var excClause: Option[ExcClause], var keepAlives: Seq[LocalVariable])
extends HasTypeList with HasArgList with HasExcClause with HasKeepAliveClause extends HasTypeList with HasArgList with HasExcClause with HasKeepAliveClause {
override def canTerminate: Boolean = excClause.isDefined || inst.isTerminator
}
...@@ -245,6 +245,7 @@ class StaticAnalyzer { ...@@ -245,6 +245,7 @@ class StaticAnalyzer {
pretty = Seq(g, ty)) pretty = Seq(g, ty))
case ty: TypeHybrid => throw error("Global cell %s: Global cell cannot have hybrid type.".format(g.repr), case ty: TypeHybrid => throw error("Global cell %s: Global cell cannot have hybrid type.".format(g.repr),
pretty = Seq(g, ty)) pretty = Seq(g, ty))
case _ =>
} }
} }
} }
...@@ -328,13 +329,6 @@ class StaticAnalyzer { ...@@ -328,13 +329,6 @@ class StaticAnalyzer {
.format(fv.repr, bb.repr, lastInst.repr, destBB.repr, dest), .format(fv.repr, bb.repr, lastInst.repr, destBB.repr, dest),
pretty = Seq(lastInst, destBB)) pretty = Seq(lastInst, destBB))
} }
} else {
if (!destBB.excParam.isDefined) {
throw error(("FuncVer %s BB %s Inst %s: Exceptional destination %s must have exceptional parameter.\n" +
"DestClause: %s")
.format(fv.repr, bb.repr, lastInst.repr, destBB.repr, dest),
pretty = Seq(lastInst, destBB))
}
} }
} }
} }
......
...@@ -255,22 +255,6 @@ class StaticAnalysisTest extends FlatSpec with Matchers { ...@@ -255,22 +255,6 @@ class StaticAnalysisTest extends FlatSpec with Matchers {
""") """)
} }
it should "complain if an exceptional dest does not have exc param" in {
catchExceptionWhenAnalyzing("""
.typedef @i32 = int<32>
.const @1 <@i32> = 1
.funcsig @sig = () -> ()
.funcdef @f VERSION %v1 <@sig> {
%entry():
CALL <@sig> @f () EXC(%b1() %b2())
%b1():
RET ()
%b2():
RET ()
}
""")
}
it should "complain if a normal dest has exc param" in { it should "complain if a normal dest has exc param" in {
catchExceptionWhenAnalyzing(""" catchExceptionWhenAnalyzing("""
.typedef @i32 = int<32> .typedef @i32 = int<32>
......
...@@ -81,7 +81,7 @@ ...@@ -81,7 +81,7 @@
%wait_body(<@thread> %nt <@thread> %nt2): %wait_body(<@thread> %nt <@thread> %nt2):
%rv = [%trap_wait] TRAP <@i32> KEEPALIVE (%nt %nt2) %rv = [%trap_wait] TRAP <@i32> KEEPALIVE (%nt %nt2)
%is_1 = EQ <@i32> %rv @I32_1 %is_1 = EQ <@i32> %rv @I32_1
BRANCH2 %is_1 %wait_exit() %wait_body() BRANCH2 %is_1 %wait_exit() %wait_body(%nt %nt2)
%wait_exit(): %wait_exit():
%nwakes = COMMINST @uvm.futex.cmp_requeue <@i32> (@the_futex @the_other_futex @I32_0 @I32_1) %nwakes = COMMINST @uvm.futex.cmp_requeue <@i32> (@the_futex @the_other_futex @I32_0 @I32_1)
......
...@@ -68,7 +68,7 @@ ...@@ -68,7 +68,7 @@
.const @I64_42 <@i64> = 42 .const @I64_42 <@i64> = 42
.funcdef @forty_two_returner VERSION %v1 <@v_i> { .funcdef @forty_two_returner VERSION %v1 <@v_v> {
%entry(): %entry():
RET @I64_42 RET @I64_42
} }
......
...@@ -143,7 +143,7 @@ ...@@ -143,7 +143,7 @@
.const @D_40 <@double> = 40.0d .const @D_40 <@double> = 40.0d
.const @D_50 <@double> = 50.0d .const @D_50 <@double> = 50.0d
.const @D_100 <@double> = 100.0d .const @D_100 <@double> = 100.0d
.const @D_NAN <@float> = nand .const @D_NAN <@double> = nand
.const @4xI32_V1 <@4xi32> = {@I32_0 @I32_1 @I32_2 @I32_3} .const @4xI32_V1 <@4xi32> = {@I32_0 @I32_1 @I32_2 @I32_3}
.const @4xI32_V2 <@4xi32> = {@I32_4 @I32_5 @I32_6 @I32_7} .const @4xI32_V2 <@4xi32> = {@I32_4 @I32_5 @I32_6 @I32_7}
......
// require "primitives.uir" // require "primitives.uir"
.funcsig @simplesum_sig = (@i64 @i64) -> (@void) .funcsig @simplesum_sig = (@i64 @i64) -> ()
.funcdef @simplesum VERSION @simplesum_v1 <@simplesum_sig> { .funcdef @simplesum VERSION @simplesum_v1 <@simplesum_sig> {
%entry (<@i64> %from <@i64> %to): %entry (<@i64> %from <@i64> %to):
[%starttrap] TRAP <> [%starttrap] TRAP <>
......
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