Commit 7ba974c9 authored by Kunshan Wang's avatar Kunshan Wang

Modified parser for the native interface.

parent 645aea48
......@@ -39,7 +39,7 @@ funcDef
;
exposeDef
: '.expose' nam=GLOBAL_NAME '=' funcName=GLOBAL_NAME '<' callconv '>' cookie=GLOBAL_NAME
: '.expose' nam=GLOBAL_NAME '=' funcName=GLOBAL_NAME callConv=flag cookie=GLOBAL_NAME
;
typeConstructor
......@@ -58,6 +58,8 @@ typeConstructor
| 'stack' # TypeStack
| 'tagref64' # TypeTagRef64
| 'vector' '<' type length=intLiteral '>' # TypeVector
| 'ptr' '<' type '>' # TypePtr
| 'funcptr' '<' funcSig '>' # TypeFuncPtr
;
funcSigConstructor
......@@ -170,14 +172,14 @@ instBody
dis=bbName ena=bbName ('WPEXC' '(' wpExc=bbName ')')? keepAliveClause # InstWatchPoint
// Foreign Function Interface
| 'CCALL' callconv '<' funcTy=type funcSig '>' callee=value argList # InstCCall
| 'CCALL' callConv=flag '<' funcTy=type funcSig '>' callee=value argList keepAliveClause # InstCCall
// Thread and Stack Operations
| 'NEWSTACK' funcCallBody excClause # InstNewStack
| 'SWAPSTACK' swappee=value curStackClause newStackClause excClause keepAliveClause # InstSwapStack
// Common Instructions
| 'COMMINST' nam=GLOBAL_NAME flagList? typeList? argList? excClause keepAliveClause # InstCommInst
| 'COMMINST' nam=GLOBAL_NAME flagList? typeList? funcSigList? argList? excClause keepAliveClause # InstCommInst
;
bbName
......@@ -201,13 +203,17 @@ keepAliveClause
;
flagList
: '<' flag* '>'
: '[' flag* ']'
;
typeList
: '<' type* '>'
;
funcSigList
: '<[' funcSig* ']>'
;
argList
: '(' value* ')'
;
......@@ -249,12 +255,8 @@ atomicrmwop
: 'XCHG' | 'ADD' | 'SUB' | 'AND' | 'NAND' | 'OR' | 'XOR' | 'MAX' | 'MIN' | 'UMAX' | 'UMIN'
;
callconv
: 'DEFAULT'
;
flag
: callconv
: FLAG
;
intLiteral
......@@ -315,6 +317,10 @@ GLOBAL_NAME
LOCAL_NAME
: LOCAL_NAME_PREFIX IDCHAR+
;
FLAG
: FLAG_PREFIX [A-Z_]+
;
fragment
DIGIT
......@@ -342,6 +348,9 @@ GLOBAL_NAME_PREFIX: '@';
fragment
LOCAL_NAME_PREFIX: '%';
fragment
FLAG_PREFIX: '#';
fragment
IDCHAR
: [a-z]
......
......@@ -16,6 +16,7 @@ class Bundle {
* + constantNs // Constants
* + globalCellNs // Global cells
* + funcNs // Functions
* + expFuncNs // Exposed functions
* + localVarNs // Local variables (per function version)
* + bbNs // Basic blocks (per function version)
*
......@@ -33,6 +34,7 @@ class Bundle {
val constantNs = new SimpleNamespace[Constant]()
val globalCellNs = new SimpleNamespace[GlobalCell]()
val funcNs = new SimpleNamespace[Function]()
val expFuncNs = new SimpleNamespace[ExposedFunc]()
/**
* Add an identified entity to its appropriate global namespaces.
......@@ -47,6 +49,7 @@ class Bundle {
if (obj.isInstanceOf[Constant]) constantNs.add(obj.asInstanceOf[Constant])
if (obj.isInstanceOf[GlobalCell]) globalCellNs.add(obj.asInstanceOf[GlobalCell])
if (obj.isInstanceOf[Function]) funcNs.add(obj.asInstanceOf[Function])
if (obj.isInstanceOf[ExposedFunc]) expFuncNs.add(obj.asInstanceOf[ExposedFunc])
}
private def simpleMerge[T <: Identified](oldNs: Namespace[T], newNs: Namespace[T]) {
......
......@@ -33,4 +33,10 @@ object CommInsts extends SimpleNamespace[CommInst] {
commInst(0x223, "@uvm.futex.cmp_requeue")
commInst(0x230, "@uvm.kill_dependency")
commInst(0x240, "@uvm.native.pin")
commInst(0x241, "@uvm.native.unpin")
commInst(0x242, "@uvm.native.expose")
commInst(0x243, "@uvm.native.unexpose")
commInst(0x244, "@uvm.native.get_cookie")
}
\ No newline at end of file
......@@ -32,4 +32,4 @@ class FuncVer extends IdentifiedSettable {
class BasicBlock extends IdentifiedSettable {
var insts: Seq[Instruction] = null
}
\ No newline at end of file
}
......@@ -13,6 +13,7 @@ import scala.collection.mutable.ArrayBuffer
import scala.collection.immutable.Stream
import java.io.StringWriter
import java.nio.CharBuffer
import uvm.ir.textinput.gen.UIRParser.TypePtrContext
class UIRTextReader(val idFactory: IDFactory) {
import uvm.ir.textinput.Later.Laterable
......@@ -158,6 +159,10 @@ class UIRTextReader(val idFactory: IDFactory) {
def resConstByName(name: String): Constant = cascadeLookup(name, bundle.constantNs, globalBundle.constantNs)
def resGlobalVar(name: String): GlobalVariable = cascadeLookup(name, bundle.globalVarNs, globalBundle.globalVarNs)
def resFunc(name: String): Function = cascadeLookup(name, bundle.funcNs, globalBundle.funcNs)
implicit def convFlag(f: FlagContext): Flag = Flag(f.FLAG().getText)
implicit def convFlagList(a: FlagListContext): Seq[Flag] = a.flag().map(convFlag)
// Add entities to namespaces.
......@@ -176,6 +181,9 @@ class UIRTextReader(val idFactory: IDFactory) {
def addFunc(obj: Function): Unit = {
bundle.add(obj)
}
def addExpFunc(obj: ExposedFunc): Unit = {
bundle.add(obj)
}
def addLocalVar(obj: LocalVariable, localNs: Namespace[LocalVariable]) = {
localNs.add(obj)
bundle.add(obj)
......@@ -201,6 +209,14 @@ class UIRTextReader(val idFactory: IDFactory) {
def needHybrid[T <: Type](tc: TypeContext) = needType(tc, classOf[TypeHybrid], "hybrid")
def needSeq[T <: Type](tc: TypeContext) = needType(tc, classOf[AbstractSeqType], "array or vector")
def needConstInt64(ctx: ParserRuleContext, name: String): ConstInt = {
val c = resConstByName(name)
if (!c.isInstanceOf[ConstInt]) {
throw new UnexpectedTypeException(inCtx(ctx, "Expected 64-bit integer constant, actually %s.".format(c.getClass)))
}
c.asInstanceOf[ConstInt]
}
// Make types and sigs
val phase1 = new Later() // Resolve inter-references between types and sigs
......@@ -222,6 +238,8 @@ class UIRTextReader(val idFactory: IDFactory) {
case t: TypeStackContext => TypeStack()
case t: TypeTagRef64Context => TypeTagRef64()
case t: TypeVectorContext => TypeVector(null, t.length.longValue()).later(phase1) { _.elemTy = resTy(t.`type`()) }
case t: TypePtrContext => TypePtr(null).later(phase1) { _.ty = resTy(t.`type`()) }
case t: TypeFuncPtrContext => TypeFuncPtr(null).later(phase1) { _.sig = resSig(t.funcSig()) }
case _ => throw new TextIRParsingException("foo")
}
return ty
......@@ -279,6 +297,14 @@ class UIRTextReader(val idFactory: IDFactory) {
return func
}
def mkExpo(c: ExposeDefContext): ExposedFunc = {
val efun = ExposedFunc(null, c.callConv, null).later(phase2) { ee =>
ee.func = resFunc(c.funcName)
ee.cookie = needConstInt64(c, c.cookie)
}
return efun
}
def tryReuseFuncID(name: String): Option[Int] = {
globalBundle.funcNs.get(name).map(_.id)
}
......@@ -319,6 +345,12 @@ class UIRTextReader(val idFactory: IDFactory) {
val func = declFunc(fdef.nam, fdef.funcSig)
funcDefs = (func, fdef) :: funcDefs
}
case edef: ExposeDefContext => {
val efun = mkExpo(edef)
efun.id = idFactory.getID()
efun.name = Some(edef.nam)
addExpFunc(efun)
}
case _ => {}
}
......@@ -387,6 +419,7 @@ class UIRTextReader(val idFactory: IDFactory) {
// Resolve special structures
implicit def resTypeList(a: TypeListContext): Seq[Type] = a.`type`.map(resTy)
implicit def resFuncSigList(a: FuncSigListContext): Seq[FuncSig] = a.funcSig().map(resSig)
implicit def resArgList(a: ArgListContext): Seq[SSAVariable] = a.value.map(resVar)
......@@ -517,42 +550,42 @@ class UIRTextReader(val idFactory: IDFactory) {
i.opnd = ii.opnd
}
case ii: InstGetFieldIRefContext =>
InstGetFieldIRef(needStruct(ii.refTy), ii.intLiteral.intValue, null).later(phase4) { i =>
InstGetFieldIRef(ii.ptr != null, needStruct(ii.refTy), ii.intLiteral.intValue, null).later(phase4) { i =>
i.opnd = ii.opnd
}
case ii: InstGetElemIRefContext =>
InstGetElemIRef(needSeq(ii.refTy), needInt(ii.indTy), null, null).later(phase4) { i =>
InstGetElemIRef(ii.ptr != null, needSeq(ii.refTy), needInt(ii.indTy), null, null).later(phase4) { i =>
i.opnd = ii.opnd; i.index = ii.index
}
case ii: InstShiftIRefContext =>
InstShiftIRef(ii.refTy, needInt(ii.offTy), null, null).later(phase4) { i =>
InstShiftIRef(ii.ptr != null, ii.refTy, needInt(ii.offTy), null, null).later(phase4) { i =>
i.opnd = ii.opnd; i.offset = ii.offset
}
case ii: InstGetFixedPartIRefContext =>
InstGetFixedPartIRef(needHybrid(ii.refTy), null).later(phase4) { i =>
InstGetFixedPartIRef(ii.ptr != null, needHybrid(ii.refTy), null).later(phase4) { i =>
i.opnd = ii.opnd
}
case ii: InstGetVarPartIRefContext =>
InstGetVarPartIRef(needHybrid(ii.refTy), null).later(phase4) { i =>
InstGetVarPartIRef(ii.ptr != null, needHybrid(ii.refTy), null).later(phase4) { i =>
i.opnd = ii.opnd
}
case ii: InstLoadContext =>
InstLoad(ii.memord, ii.`type`, null, null).later(phase4) { i =>
InstLoad(ii.ptr != null, ii.memord, ii.`type`, null, null).later(phase4) { i =>
i.loc = ii.loc
i.excClause = ii.excClause
}
case ii: InstStoreContext =>
InstStore(ii.memord, ii.`type`, null, null, null).later(phase4) { i =>
InstStore(ii.ptr != null, ii.memord, ii.`type`, null, null, null).later(phase4) { i =>
i.loc = ii.loc; i.newVal = ii.newVal
i.excClause = ii.excClause
}
case ii: InstCmpXchgContext =>
InstCmpXchg(ii.isWeak != null, ii.ordSucc, ii.ordFail, ii.`type`, null, null, null, null).later(phase4) { i =>
InstCmpXchg(ii.ptr != null, ii.isWeak != null, ii.ordSucc, ii.ordFail, ii.`type`, null, null, null, null).later(phase4) { i =>
i.loc = ii.loc; i.expected = ii.expected; i.desired = ii.desired
i.excClause = ii.excClause
}
case ii: InstAtomicRMWContext =>
InstAtomicRMW(ii.memord, AtomicRMWOptr.withName(ii.atomicrmwop.getText), ii.`type`, null, null, null).later(phase4) { i =>
InstAtomicRMW(ii.ptr != null, ii.memord, AtomicRMWOptr.withName(ii.atomicrmwop.getText), ii.`type`, null, null, null).later(phase4) { i =>
i.loc = ii.loc; i.opnd = ii.opnd
i.excClause = ii.excClause
}
......@@ -567,8 +600,8 @@ class UIRTextReader(val idFactory: IDFactory) {
i.dis = ii.dis; i.ena = ii.ena; i.exc = Option(ii.wpExc).map(resBB); i.keepAlives = ii.keepAliveClause
}
case ii: InstCCallContext =>
InstCCall(CallConv.withName(ii.callconv.getText), ii.funcTy, ii.funcSig, null, null).later(phase4) { i =>
i.callee = ii.callee; i.argList = ii.argList
InstCCall(ii.callConv, ii.funcTy, ii.funcSig, null, null, null).later(phase4) { i =>
i.callee = ii.callee; i.argList = ii.argList; i.keepAlives = ii.keepAliveClause
}
case ii: InstNewStackContext =>
InstNewStack(null, null, null, null).later(phase4) { i =>
......@@ -590,8 +623,9 @@ class UIRTextReader(val idFactory: IDFactory) {
i.excClause = ii.excClause; i.keepAlives = ii.keepAliveClause
}
case ii: InstCommInstContext =>
InstCommInst(CommInsts(ii.nam), null, null, null, null).later(phase4) { i =>
InstCommInst(CommInsts(ii.nam), Option(ii.flagList()).map(convFlagList).getOrElse(Seq()), null, null, null, null, null).later(phase4) { i =>
i.typeList = Option(ii.typeList).map(resTypeList).getOrElse(Seq())
i.funcSigList = Option(ii.funcSigList).map(resFuncSigList).getOrElse(Seq())
i.argList = Option(ii.argList).map(resArgList).getOrElse(Seq())
i.excClause = ii.excClause; i.keepAlives = ii.keepAliveClause
}
......
......@@ -630,7 +630,7 @@ class InterpreterThread(val id: Int, microVM: MicroVM, initialStack: Interpreter
continueNormally()
}
case i @ InstGetFieldIRef(referentTy, index, opnd) => {
case i @ InstGetFieldIRef(ptr, referentTy, index, opnd) => {
val ob = boxOf(opnd).asInstanceOf[BoxIRef]
val ib = boxOf(i).asInstanceOf[BoxIRef]
ib.objRef = ob.objRef
......@@ -638,7 +638,7 @@ class InterpreterThread(val id: Int, microVM: MicroVM, initialStack: Interpreter
continueNormally()
}
case i @ InstGetElemIRef(referentTy, indTy, opnd, index) => {
case i @ InstGetElemIRef(ptr, referentTy, indTy, opnd, index) => {
val ob = boxOf(opnd).asInstanceOf[BoxIRef]
val indb = boxOf(index).asInstanceOf[BoxInt]
val ind = OpHelper.prepareSigned(indb.value, indTy.length)
......@@ -648,7 +648,7 @@ class InterpreterThread(val id: Int, microVM: MicroVM, initialStack: Interpreter
continueNormally()
}
case i @ InstShiftIRef(referentTy, offTy, opnd, offset) => {
case i @ InstShiftIRef(ptr, referentTy, offTy, opnd, offset) => {
val ob = boxOf(opnd).asInstanceOf[BoxIRef]
val offb = boxOf(offset).asInstanceOf[BoxInt]
val off = OpHelper.prepareSigned(offb.value, offTy.length)
......@@ -658,7 +658,7 @@ class InterpreterThread(val id: Int, microVM: MicroVM, initialStack: Interpreter
continueNormally()
}
case i @ InstGetFixedPartIRef(referentTy, opnd) => {
case i @ InstGetFixedPartIRef(ptr, referentTy, opnd) => {
val ob = boxOf(opnd).asInstanceOf[BoxIRef]
val ib = boxOf(i).asInstanceOf[BoxIRef]
ib.objRef = ob.objRef
......@@ -666,7 +666,7 @@ class InterpreterThread(val id: Int, microVM: MicroVM, initialStack: Interpreter
continueNormally()
}
case i @ InstGetVarPartIRef(referentTy, opnd) => {
case i @ InstGetVarPartIRef(ptr, referentTy, opnd) => {
val ob = boxOf(opnd).asInstanceOf[BoxIRef]
val ib = boxOf(i).asInstanceOf[BoxIRef]
ib.objRef = ob.objRef
......@@ -674,7 +674,7 @@ class InterpreterThread(val id: Int, microVM: MicroVM, initialStack: Interpreter
continueNormally()
}
case i @ InstLoad(ord, referentTy, loc, excClause) => {
case i @ InstLoad(ptr, ord, referentTy, loc, excClause) => {
val uty = InternalTypePool.unmarkedOf(referentTy)
val lb = boxOf(loc).asInstanceOf[BoxIRef]
val ib = boxOf(i)
......@@ -688,7 +688,7 @@ class InterpreterThread(val id: Int, microVM: MicroVM, initialStack: Interpreter
}
}
case i @ InstStore(ord, referentTy, loc, newVal, excClause) => {
case i @ InstStore(ptr, ord, referentTy, loc, newVal, excClause) => {
val uty = InternalTypePool.unmarkedOf(referentTy)
val lb = boxOf(loc).asInstanceOf[BoxIRef]
val nvb = boxOf(newVal)
......@@ -703,7 +703,7 @@ class InterpreterThread(val id: Int, microVM: MicroVM, initialStack: Interpreter
}
}
case i @ InstCmpXchg(weak, ordSucc, ordFail, referentTy, loc, expected, desired, excClause) => {
case i @ InstCmpXchg(ptr, weak, ordSucc, ordFail, referentTy, loc, expected, desired, excClause) => {
val uty = InternalTypePool.unmarkedOf(referentTy)
val lb = boxOf(loc).asInstanceOf[BoxIRef]
val eb = boxOf(expected)
......@@ -719,7 +719,7 @@ class InterpreterThread(val id: Int, microVM: MicroVM, initialStack: Interpreter
}
}
case i @ InstAtomicRMW(ord, op, referentTy, loc, opnd, excClause) => {
case i @ InstAtomicRMW(ptr, ord, op, referentTy, loc, opnd, excClause) => {
val uty = InternalTypePool.unmarkedOf(referentTy)
val lb = boxOf(loc).asInstanceOf[BoxIRef]
val ob = boxOf(opnd)
......@@ -753,7 +753,7 @@ class InterpreterThread(val id: Int, microVM: MicroVM, initialStack: Interpreter
}
}
case i @ InstCCall(callConv, funcTy, sig, callee, argList) => {
case i @ InstCCall(callConv, funcTy, sig, callee, argList, keepAlives) => {
throw new UvmRefImplException(ctx + "The CCALL instruction is not implemented in this reference implementation")
}
......@@ -806,7 +806,7 @@ class InterpreterThread(val id: Int, microVM: MicroVM, initialStack: Interpreter
}
}
case i @ InstCommInst(ci, typeList, argList, excClause, keepAlives) => {
case i @ InstCommInst(ci, flagList, typeList, sigList, argList, excClause, keepAlives) => {
ci.name.get match {
// Thread and stack operations
case "@uvm.new_thread" => {
......
......@@ -8,7 +8,7 @@ abstract class SSAVariable extends IdentifiedSettable {
override def hashCode(): Int = id
override def equals(that: Any): Boolean = that match {
case v: AnyRef => this eq v
case _ => false
case _ => false
}
}
......@@ -34,6 +34,8 @@ case class ConstVector(var constTy: Type, var elems: Seq[Constant]) extends Cons
case class GlobalCell(var cellTy: Type) extends GlobalVariable
case class ExposedFunc(var func: Function, var callConv: Flag, var cookie: ConstInt) extends GlobalVariable
// Local variables: Parameters and Instructions
abstract class LocalVariable extends SSAVariable
......@@ -65,7 +67,7 @@ import uvm.ssavariables.CmpOptr.CmpOptr
object ConvOptr extends Enumeration {
type ConvOptr = Value
val TRUNC, ZEXT, SEXT, FPTRUNC, FPEXT, FPTOUI, FPTOSI, UITOFP, SITOFP, BITCAST, REFCAST = Value
val TRUNC, ZEXT, SEXT, FPTRUNC, FPEXT, FPTOUI, FPTOSI, UITOFP, SITOFP, BITCAST, REFCAST, PTRCAST = Value
}
import uvm.ssavariables.ConvOptr.ConvOptr
......@@ -84,13 +86,6 @@ object AtomicRMWOptr extends Enumeration {
import uvm.ssavariables.AtomicRMWOptr.AtomicRMWOptr
object CallConv extends Enumeration {
type CallConv = Value
val DEFAULT = Value
}
import uvm.ssavariables.CallConv.CallConv
/// Abstract instructions and traits
trait HasTypeList extends Instruction {
......@@ -135,6 +130,10 @@ abstract class HeapAlloc extends AbstractAlloc
abstract class StackAlloc extends AbstractAlloc
trait WorksWithPointer extends Instruction {
var ptr: Boolean
}
abstract class AbstractTrap extends HasKeepAliveClause {
var retTy: Type
}
......@@ -154,6 +153,11 @@ case class ThrowExc(var exc: SSAVariable) extends NewStackAction
*/
trait EdgeAssigned extends Instruction
/**
* Flags are used in common instructions.
*/
case class Flag(name: String)
/// Concrete instructions
case class InstBinOp(var op: BinOptr, var opndTy: Type, var op1: SSAVariable, var op2: SSAVariable,
var excClause: Option[ExcClause]) extends HasExcClause
......@@ -175,8 +179,7 @@ case class InstSwitch(var opndTy: Type, var opnd: SSAVariable, var defDest: Basi
case class InstPhi(var opndTy: Type, var cases: Seq[(BasicBlock, SSAVariable)]) extends Instruction with EdgeAssigned
case class InstCall(var sig: FuncSig, var callee: SSAVariable, var argList: Seq[SSAVariable],
var excClause: Option[ExcClause], var keepAlives: Seq[LocalVariable]
) extends AbstractCall with HasExcClause with HasKeepAliveClause
var excClause: Option[ExcClause], var keepAlives: Seq[LocalVariable]) extends AbstractCall with HasExcClause with HasKeepAliveClause
case class InstTailCall(var sig: FuncSig, var callee: SSAVariable, var argList: Seq[SSAVariable]) extends AbstractCall
......@@ -190,7 +193,6 @@ case class InstLandingPad() extends Instruction with EdgeAssigned
case class InstExtractValue(var strTy: TypeStruct, var index: Int, var opnd: SSAVariable) extends Instruction
case class InstInsertValue(var strTy: TypeStruct, var index: Int, var opnd: SSAVariable, var newVal: SSAVariable) extends Instruction
case class InstExtractElement(var vecTy: TypeVector, var indTy: TypeInt,
......@@ -212,27 +214,27 @@ case class InstAllocaHybrid(var allocTy: TypeHybrid, var lenTy: TypeInt, var len
case class InstGetIRef(var referentTy: Type, var opnd: SSAVariable) extends Instruction
case class InstGetFieldIRef(var referentTy: TypeStruct, var index: Int, var opnd: SSAVariable) extends Instruction
case class InstGetFieldIRef(var ptr: Boolean, var referentTy: TypeStruct, var index: Int, var opnd: SSAVariable) extends WorksWithPointer
case class InstGetElemIRef(var referentTy: AbstractSeqType, var indTy: TypeInt,
var opnd: SSAVariable, var index: SSAVariable) extends Instruction
case class InstGetElemIRef(var ptr: Boolean, var referentTy: AbstractSeqType, var indTy: TypeInt,
var opnd: SSAVariable, var index: SSAVariable) extends WorksWithPointer
case class InstShiftIRef(var referentTy: Type, var offTy: TypeInt,
var opnd: SSAVariable, var offset: SSAVariable) extends Instruction
case class InstShiftIRef(var ptr: Boolean, var referentTy: Type, var offTy: TypeInt,
var opnd: SSAVariable, var offset: SSAVariable) extends WorksWithPointer
case class InstGetFixedPartIRef(var referentTy: TypeHybrid, var opnd: SSAVariable) extends Instruction
case class InstGetFixedPartIRef(var ptr: Boolean, var referentTy: TypeHybrid, var opnd: SSAVariable) extends WorksWithPointer
case class InstGetVarPartIRef(var referentTy: TypeHybrid, var opnd: SSAVariable) extends Instruction
case class InstGetVarPartIRef(var ptr: Boolean, var referentTy: TypeHybrid, var opnd: SSAVariable) extends WorksWithPointer
case class InstLoad(var ord: MemoryOrder, var referentTy: Type, var loc: SSAVariable, var excClause: Option[ExcClause]) extends HasExcClause
case class InstLoad(var ptr: Boolean, var ord: MemoryOrder, var referentTy: Type, var loc: SSAVariable, var excClause: Option[ExcClause]) extends WorksWithPointer with HasExcClause
case class InstStore(var ord: MemoryOrder, var referentTy: Type, var loc: SSAVariable, var newVal: SSAVariable, var excClause: Option[ExcClause]) extends HasExcClause
case class InstStore(var ptr: Boolean, var ord: MemoryOrder, var referentTy: Type, var loc: SSAVariable, var newVal: SSAVariable, var excClause: Option[ExcClause]) extends WorksWithPointer with HasExcClause
case class InstCmpXchg(var weak: Boolean, var ordSucc: MemoryOrder, var ordFail: MemoryOrder, var referentTy: Type,
var loc: SSAVariable, var expected: SSAVariable, var desired: SSAVariable, var excClause: Option[ExcClause]) extends HasExcClause
case class InstCmpXchg(var ptr: Boolean, var weak: Boolean, var ordSucc: MemoryOrder, var ordFail: MemoryOrder, var referentTy: Type,
var loc: SSAVariable, var expected: SSAVariable, var desired: SSAVariable, var excClause: Option[ExcClause]) extends WorksWithPointer with HasExcClause
case class InstAtomicRMW(var ord: MemoryOrder, var op: AtomicRMWOptr,
var referentTy: Type, var loc: SSAVariable, var opnd: SSAVariable, var excClause: Option[ExcClause]) extends HasExcClause
case class InstAtomicRMW(var ptr: Boolean, var ord: MemoryOrder, var op: AtomicRMWOptr,
var referentTy: Type, var loc: SSAVariable, var opnd: SSAVariable, var excClause: Option[ExcClause]) extends WorksWithPointer with HasExcClause
case class InstFence(var ord: MemoryOrder) extends Instruction
......@@ -242,8 +244,8 @@ case class InstWatchPoint(var wpID: Int, var retTy: Type,
var dis: BasicBlock, var ena: BasicBlock, var exc: Option[BasicBlock],
var keepAlives: Seq[LocalVariable]) extends AbstractTrap
case class InstCCall(var callConv: CallConv, var funcTy: Type,
var sig: FuncSig, var callee: SSAVariable, var argList: Seq[SSAVariable]) extends CallLike
case class InstCCall(var callConv: Flag, var funcTy: Type,
var sig: FuncSig, var callee: SSAVariable, var argList: Seq[SSAVariable], var keepAlives: Seq[LocalVariable]) extends CallLike with HasKeepAliveClause
case class InstNewStack(var sig: FuncSig, var callee: SSAVariable, var argList: Seq[SSAVariable],
var excClause: Option[ExcClause]) extends CallLike with HasExcClause
......@@ -251,6 +253,6 @@ case class InstNewStack(var sig: FuncSig, var callee: SSAVariable, var argList:
case class InstSwapStack(var swappee: SSAVariable, var curStackAction: CurStackAction, var newStackAction: NewStackAction,
var excClause: Option[ExcClause], var keepAlives: Seq[LocalVariable]) extends HasExcClause with HasKeepAliveClause
case class InstCommInst(var inst: CommInst, var typeList: Seq[Type], var argList: Seq[SSAVariable],
case class InstCommInst(var inst: CommInst, var flagList: Seq[Flag], var typeList: Seq[Type], var funcSigList: Seq[FuncSig], var argList: Seq[SSAVariable],
var excClause: Option[ExcClause], var keepAlives: Seq[LocalVariable])
extends HasTypeList with HasArgList with HasExcClause with HasKeepAliveClause
extends HasTypeList with HasArgList with HasExcClause with HasKeepAliveClause
......@@ -22,6 +22,8 @@ abstract class AbstractSeqType extends Type {
def len: Long
}
abstract class AbstractPointerType extends Type
case class TypeInt(var length: Int) extends Type
case class TypeFloat() extends FPType
case class TypeDouble() extends FPType
......@@ -37,6 +39,8 @@ case class TypeThread() extends Type
case class TypeStack() extends Type
case class TypeTagRef64() extends Type
case class TypeVector(var elemTy: Type, var len: Long) extends AbstractSeqType
case class TypePtr(var ty: Type) extends AbstractPointerType
case class TypeFuncPtr(var sig: FuncSig) extends AbstractPointerType
object Type {
def prettyPrint(ty: Type): String = ty match {
......@@ -55,6 +59,8 @@ object Type {
case TypeStack() => "stack"
case TypeTagRef64() => "tagref64"
case TypeVector(elemTy, len) => "vector<%s %d>".format(elemTy.repr, len)
case TypePtr(ty) => "ptr<%s>".format(ty.repr)
case TypeFuncPtr(sig) => "funcptr<%s>".format(FuncSig.prettyPrint(sig))
case _ => "unknown type " + ty.getClass.getName
}
}
......
......@@ -28,3 +28,6 @@
RET <@i32> @zero
}
.const @zero64 <@i64> = 0
.expose @main_native = @main #DEFAULT @zero64
......@@ -35,6 +35,12 @@
.typedef @4xi32 = vector <@i32 4>
.typedef @2xdouble = vector <@double 2>
.typedef @pv = ptr<@void>
.typedef @pi32 = ptr<@i32>
.typedef @pi64 = ptr<@i64>
.typedef @npnr_fp = funcptr<@npnr_sig>
.typedef @iii_fp = funcptr<@iii_sig>
.const @I8_0 <@i8> = 0
.const @I16_0 <@i16> = 0
.const @I32_0 <@i32> = 0
......@@ -164,6 +170,14 @@
RETVOID
}
.funcsig @ptrCastTest_sig = @void (@i64)
.funcdef @ptrCastTest VERSION @ptrCastTest_v1 <@ptrCastTest_sig> (%p0) {
%entry:
%ptrcast = PTRCAST <@i64 @pi64> %p0
RETVOID
}
.funcsig @select_sig = @void ()
.funcdef @select VERSION @select_v1 <@select_sig> () {
%entry:
......@@ -237,6 +251,7 @@
}
.typedef @sid = struct <@i64 @double>
.typedef @rsid = ref<@sid>
.const @sid1 <@sid> = {@I64_1 @D_1}
.const @v1 <@4xfloat> = VEC {@F_0 @F_0 @F_0 @F_0}
......@@ -260,7 +275,9 @@
}
.typedef @al = array <@i64 10>
.typedef @ral = ref<@al>
.typedef @hic = hybrid <@i64 @i8>
.typedef @rhic = ref<@hic>
.funcsig @memops_sig = @void (@i64 @i64)
.funcdef @memops VERSION @memops_v1 <@memops_sig> (%p0 %p1) {
......@@ -315,6 +332,35 @@
RETVOID
}
.funcsig @memops_ptr_sig = @void (@i64 @i64)
.funcdef @memops_ptr VERSION @memops_ptr_v1 <@memops_ptr_sig> (%p0 %p1) {
%entry:
%new = NEW <@i64>
%newhybrid = NEWHYBRID <@hic @i64> %p0
%new2 = NEW <@sid>
%new3 = NEW <@al>
%p = COMMINST @uvm.native.pin <@ri64> (%new)
%ph = COMMINST @uvm.native.pin <@rhic> (%newhybrid)
%p2 = COMMINST @uvm.native.pin <@rsid> (%new2)
%p3 = COMMINST @uvm.native.pin <@ral> (%new3)
%getfieldiref = GETFIELDIREF PTR <@sid 0> %p2
%getelemiref = GETELEMIREF PTR <@al @i64> %p3 %p1
%getfixedpartiref = GETFIXEDPARTIREF PTR <@hic> %ph
%getvarpartiref = GETVARPARTIREF PTR <@hic> %ph
%shiftiref = SHIFTIREF PTR <@i8 @i64> %getvarpartiref %p1
%load = LOAD PTR <@i64> %p
%store = STORE PTR <@i64> %p @I64_42
%cmpxchg = CMPXCHG PTR SEQ_CST SEQ_CST <@i64> %p @I64_42 @I64_0
%atomicrmw = ATOMICRMW PTR SEQ_CST ADD <@i64> %p @I64_43
RETVOID
}
.funcsig @memorder_sig = @void (@ii64)
.funcdef @memorder VERSION @memorder_v1 <@memorder_sig> (%p0) {
......@@ -382,11 +428,12 @@
}
.funcsig @ccall_callee_sig = @void (@double)
.typedef @ccall_callee_fp = funcptr<@ccall_callee_sig>
.funcsig @ccall_sig = @void (@i64)
.funcsig @ccall_sig = @void (@ccall_callee_fp)
.funcdef @ccall VERSION @ccall_v1 <@ccall_sig> (%p0) {
%entry:
%rv = CCALL DEFAULT <@i64 @ccall_callee_sig> %p0 (@D_1)
%rv = CCALL #DEFAULT <@ccall_callee_fp @ccall_callee_sig> %p0 (@D_1)
RETVOID
}
......@@ -419,6 +466,9 @@
%curstack = COMMINST @uvm.current_stack
%sta = NEWSTACK <@iii_sig> @callee2 (%curstack)
%thr = COMMINST @uvm.new_thread (%sta)
%ex = COMMINST @uvm.native.expose [#DEFAULT] <[@npnr_sig]> (@swapstack)
%th_ex = COMMINST @uvm.thread_exit
RETVOID
}
......@@ -45,3 +45,8 @@
.typedef @4xfloat = vector <@float 4>
.typedef @4xi32 = vector <@i32 4>
.typedef @2xdouble = vector <@double 2>
.typedef @i32_p = ptr<@i32>
.typedef @i64_p = ptr<@i64>
.typedef @sig0_fp = funcptr<@sig0>
.typedef @sig1_fp = funcptr<@sig1>
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